VLSI implementation of a binary neural network-two case studies

Amine Bermak, J. Austin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

A comparison between a bit-level and a conventional VLSI implementation of a binary neural network is presented. This network is based on Correlation Matrix Memory (CMM) that stores relationships between pairs of binary vectors. The bit-level architecture consists of an n×m array of bit-level processors holding the storage and computation elements. The conventional CMM architecture consists of a RAM memory holding the CMM storage and an array of counters. Since we are interested in the VLSI implementation of such networks, hardware complexities and speeds of both bit-level and conventional architecture were compared by using VLSI tools. It is shown that a significant speedup is achieved by using the bit-level architecture since the speed of this last configuration is not limited by the memory addressing delay. Moreover, the bit-level architecture is very simple and reduces the bus/routing, making the architecture suitable for VLSI implementation. The main drawback of such an approach compared to the conventional one is the demand for a high number of adders for dealing with a large number of inputs.

Original languageEnglish
Title of host publicationProceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, MicroNeuro 1999
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages374-379
Number of pages6
ISBN (Electronic)0769500439, 9780769500430
DOIs
Publication statusPublished - 1 Jan 1999
Event7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, MicroNeuro 1999 - Granada, Spain
Duration: 7 Apr 19999 Apr 1999

Other

Other7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, MicroNeuro 1999
CountrySpain
CityGranada
Period7/4/999/4/99

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Keywords

  • Binary neural networks
  • Bit-level architecture
  • Internal storage processors
  • VLSI implementation

ASJC Scopus subject areas

  • Hardware and Architecture
  • Signal Processing
  • Neuroscience (miscellaneous)
  • Electrical and Electronic Engineering

Cite this

Bermak, A., & Austin, J. (1999). VLSI implementation of a binary neural network-two case studies. In Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, MicroNeuro 1999 (pp. 374-379). [758889] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/MN.1999.758889