Understanding SRAM stability via bifurcation analysis

Analytical models and scaling trends

Yenpo Ho, Garng Morton Huang, Peng Li

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

In the past decades, aggressive scaling of transistor feature size has been a primary force driving higher Static Random Access Memory (SRAM) integration density. Due to technology scaling, nanometer SRAM designs become increasingly vulnerable to stability challenges. The traditional way of analyzing stability is through the use of Static Noise Margins (SNMs). SNMs are not capable of capturing the key nonlinear dynamics associated with memory operations, leading to imprecise characterization of stability. This work rigorously develops dynamic stability concepts and, more importantly, captures them in physically based analytical models. By leveraging nonlinear stability theory, we develop analytical models that characterize the minimum required amplitude and duration of injected current noises that can flip the SRAM state. These models, which are parameterized in key design, technology, and operating condition parameters, provide important design insights and offer a basis for predicting scaling trends of SRAM dynamic stability.

Original languageEnglish
Article number41
JournalACM Transactions on Design Automation of Electronic Systems
Volume19
Issue number4
DOIs
Publication statusPublished - 1 Jan 2014
Externally publishedYes

Fingerprint

Bifurcation (mathematics)
Analytical models
Data storage equipment
Transistors

Keywords

  • Analytical model
  • Critical current
  • Critical time
  • Dynamic noise margin
  • Static noise margin
  • Static random access memory
  • Voltage transfer curves

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

Cite this

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