Two-stage interface circuit design for a 32-color resolution optical sensor

Maher Assaad, Israel Yohannes, Amine Bermak

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

An interface circuit design for an optical sensor based on a two-stage cascaded architecture is presented in this paper. The proposed design is a mixed signal solution that provides few advantages in terms of speed, power consumption, higher resolution with smaller number of storage units, and small area for future on-chip integration. Simulation and experimental results for five bits resolution (32 levels) are presented to validate the design. We are aiming for a single-chip integrated solution; however, for a quick proof of concept, the proposed design has been implemented as a PCB using discrete off-the-shelf components. The biasing current and power consumption from the PCB implementation are 192 mA and 1.3 W, respectively, at a 6.75-V supply voltage.

Original languageEnglish
Article number6329923
Pages (from-to)610-617
Number of pages8
JournalIEEE Sensors Journal
Volume13
Issue number2
DOIs
Publication statusPublished - 2013
Externally publishedYes

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Keywords

  • Interface circuit
  • mixed signal
  • optical sensor

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Instrumentation

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