Shunting inhibition-based on-chip processing for CMOS imagers

F. Boussaid, Amine Bermak, A. Bouzerdoum

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Biologically inspired shunting inhibition-based processing is shown to improve significantly the performance of conventional CMOS imagers in terms of dynamic range, sensitivity adaptation but also to provide image processing capabilities such as edge detection and image enhancement. A CMOS imager architecture using current-mode pixels and computation on readout is proposed, which enables shunting inhibition-based processing to be integrated on-chip with the pixels. Fully programmable, the architecture is based on a simple set of externally-tunable parameters that define the imager transfer characteristic, dynamic range compression and sensitivity as well as the type of image processing task requested.

Original languageEnglish
Title of host publicationICONIP 2002 - Proceedings of the 9th International Conference on Neural Information Processing: Computational Intelligence for the E-Age
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1310-1314
Number of pages5
Volume3
ISBN (Electronic)9810475241, 9789810475246
DOIs
Publication statusPublished - 2002
Externally publishedYes
Event9th International Conference on Neural Information Processing, ICONIP 2002 - Singapore, Singapore
Duration: 18 Nov 200222 Nov 2002

Other

Other9th International Conference on Neural Information Processing, ICONIP 2002
CountrySingapore
CitySingapore
Period18/11/0222/11/02

Fingerprint

Image sensors
Image processing
Processing
Pixels
Image enhancement
Edge detection

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Information Systems
  • Signal Processing

Cite this

Boussaid, F., Bermak, A., & Bouzerdoum, A. (2002). Shunting inhibition-based on-chip processing for CMOS imagers. In ICONIP 2002 - Proceedings of the 9th International Conference on Neural Information Processing: Computational Intelligence for the E-Age (Vol. 3, pp. 1310-1314). [1202833] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICONIP.2002.1202833

Shunting inhibition-based on-chip processing for CMOS imagers. / Boussaid, F.; Bermak, Amine; Bouzerdoum, A.

ICONIP 2002 - Proceedings of the 9th International Conference on Neural Information Processing: Computational Intelligence for the E-Age. Vol. 3 Institute of Electrical and Electronics Engineers Inc., 2002. p. 1310-1314 1202833.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Boussaid, F, Bermak, A & Bouzerdoum, A 2002, Shunting inhibition-based on-chip processing for CMOS imagers. in ICONIP 2002 - Proceedings of the 9th International Conference on Neural Information Processing: Computational Intelligence for the E-Age. vol. 3, 1202833, Institute of Electrical and Electronics Engineers Inc., pp. 1310-1314, 9th International Conference on Neural Information Processing, ICONIP 2002, Singapore, Singapore, 18/11/02. https://doi.org/10.1109/ICONIP.2002.1202833
Boussaid F, Bermak A, Bouzerdoum A. Shunting inhibition-based on-chip processing for CMOS imagers. In ICONIP 2002 - Proceedings of the 9th International Conference on Neural Information Processing: Computational Intelligence for the E-Age. Vol. 3. Institute of Electrical and Electronics Engineers Inc. 2002. p. 1310-1314. 1202833 https://doi.org/10.1109/ICONIP.2002.1202833
Boussaid, F. ; Bermak, Amine ; Bouzerdoum, A. / Shunting inhibition-based on-chip processing for CMOS imagers. ICONIP 2002 - Proceedings of the 9th International Conference on Neural Information Processing: Computational Intelligence for the E-Age. Vol. 3 Institute of Electrical and Electronics Engineers Inc., 2002. pp. 1310-1314
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