Resource efficient parallel architectures for linear matrix algebra in real time adaptive control algorithms on reconfigurable logic

Fahad Ahmad Khan, Rizwan Arshad Ashraf, Qammar Hussain Abbasi, Ali Arshad Nasir

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Parallel and systolic structures for matrix algebra algorithms have been around for quite a long time. Various implementations of different numerical techniques exist. With the advent of reconfigurable logic, especially FPGAs, a need has arisen to revisit these architectures and produce resource efficient versions of these algorithms. We have produced resource efficient parallel architectures for LU Decomposition and Triangular Matrix Inversion, keeping in view data computational rate requirements for real time control systems. These architectures decrease memory logic resources considerably and also maintain excellent clock period results. They also have the capability to be mapped over each other thereby further reducing resource usage and also providing us with the additional facility of Matrix Multiplication.

Original languageEnglish
Title of host publication2nd International Conference on Electrical Engineering, ICEE
DOIs
Publication statusPublished - 2008
Externally publishedYes
Event2nd International Conference on Electrical Engineering, ICEE - Lahore, Pakistan
Duration: 25 Mar 200826 Mar 2008

Other

Other2nd International Conference on Electrical Engineering, ICEE
CountryPakistan
CityLahore
Period25/3/0826/3/08

Fingerprint

Linear algebra
Parallel architectures
Memory architecture
Real time control
Field programmable gate arrays (FPGA)
Clocks
Decomposition
Control systems

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Khan, F. A., Ashraf, R. A., Abbasi, Q. H., & Nasir, A. A. (2008). Resource efficient parallel architectures for linear matrix algebra in real time adaptive control algorithms on reconfigurable logic. In 2nd International Conference on Electrical Engineering, ICEE [4553939] https://doi.org/10.1109/ICEE.2008.4553939

Resource efficient parallel architectures for linear matrix algebra in real time adaptive control algorithms on reconfigurable logic. / Khan, Fahad Ahmad; Ashraf, Rizwan Arshad; Abbasi, Qammar Hussain; Nasir, Ali Arshad.

2nd International Conference on Electrical Engineering, ICEE. 2008. 4553939.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Khan, FA, Ashraf, RA, Abbasi, QH & Nasir, AA 2008, Resource efficient parallel architectures for linear matrix algebra in real time adaptive control algorithms on reconfigurable logic. in 2nd International Conference on Electrical Engineering, ICEE., 4553939, 2nd International Conference on Electrical Engineering, ICEE, Lahore, Pakistan, 25/3/08. https://doi.org/10.1109/ICEE.2008.4553939
Khan, Fahad Ahmad ; Ashraf, Rizwan Arshad ; Abbasi, Qammar Hussain ; Nasir, Ali Arshad. / Resource efficient parallel architectures for linear matrix algebra in real time adaptive control algorithms on reconfigurable logic. 2nd International Conference on Electrical Engineering, ICEE. 2008.
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