Power analysis attack resistance engineering by dynamic voltage and frequency scaling

Shengqi Yang, Pallav Gupta, Marilyn Wolf, Dimitrios Serpanos, Vijaykrishnan Narayanan, Yuan Xie

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

This article proposes a novel approach to cryptosystem design to prevent power analysis attacks. Such attacks infer program behavior by continuously monitoring the power supply current going into the processor core. They form an important class of security attacks. Our approach is based on dynamic voltage and frequency scaling (DVFS), which hides processor state to make it harder for an attacker to gain access to a secure system. Three designs are studied to test the efficacy of the DVFS method against power analysis attacks. The advanced realization of our cryptosystem is presented which achieves enough high power and time trace entropies to block various kinds of power analysis attacks in the DES algorithm. We observed 27% energy reduction and 16% time overhead in these algorithms. Finally, DVFS hardness analysis is presented.

Original languageEnglish
Article number2345774
JournalTransactions on Embedded Computing Systems
Volume11
Issue number3
DOIs
Publication statusPublished - 1 Sep 2012
Externally publishedYes

Fingerprint

Cryptography
Entropy
Hardness
Monitoring
Voltage scaling
Dynamic frequency scaling
Side channel attack

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software

Cite this

Power analysis attack resistance engineering by dynamic voltage and frequency scaling. / Yang, Shengqi; Gupta, Pallav; Wolf, Marilyn; Serpanos, Dimitrios; Narayanan, Vijaykrishnan; Xie, Yuan.

In: Transactions on Embedded Computing Systems, Vol. 11, No. 3, 2345774, 01.09.2012.

Research output: Contribution to journalArticle

Yang, Shengqi ; Gupta, Pallav ; Wolf, Marilyn ; Serpanos, Dimitrios ; Narayanan, Vijaykrishnan ; Xie, Yuan. / Power analysis attack resistance engineering by dynamic voltage and frequency scaling. In: Transactions on Embedded Computing Systems. 2012 ; Vol. 11, No. 3.
@article{d403eb32b4234c9aaaeeef4a8feb2a81,
title = "Power analysis attack resistance engineering by dynamic voltage and frequency scaling",
abstract = "This article proposes a novel approach to cryptosystem design to prevent power analysis attacks. Such attacks infer program behavior by continuously monitoring the power supply current going into the processor core. They form an important class of security attacks. Our approach is based on dynamic voltage and frequency scaling (DVFS), which hides processor state to make it harder for an attacker to gain access to a secure system. Three designs are studied to test the efficacy of the DVFS method against power analysis attacks. The advanced realization of our cryptosystem is presented which achieves enough high power and time trace entropies to block various kinds of power analysis attacks in the DES algorithm. We observed 27{\%} energy reduction and 16{\%} time overhead in these algorithms. Finally, DVFS hardness analysis is presented.",
author = "Shengqi Yang and Pallav Gupta and Marilyn Wolf and Dimitrios Serpanos and Vijaykrishnan Narayanan and Yuan Xie",
year = "2012",
month = "9",
day = "1",
doi = "10.1145/2345770.2345774",
language = "English",
volume = "11",
journal = "ACM Transactions on Embedded Computing Systems",
issn = "1539-9087",
publisher = "Association for Computing Machinery (ACM)",
number = "3",

}

TY - JOUR

T1 - Power analysis attack resistance engineering by dynamic voltage and frequency scaling

AU - Yang, Shengqi

AU - Gupta, Pallav

AU - Wolf, Marilyn

AU - Serpanos, Dimitrios

AU - Narayanan, Vijaykrishnan

AU - Xie, Yuan

PY - 2012/9/1

Y1 - 2012/9/1

N2 - This article proposes a novel approach to cryptosystem design to prevent power analysis attacks. Such attacks infer program behavior by continuously monitoring the power supply current going into the processor core. They form an important class of security attacks. Our approach is based on dynamic voltage and frequency scaling (DVFS), which hides processor state to make it harder for an attacker to gain access to a secure system. Three designs are studied to test the efficacy of the DVFS method against power analysis attacks. The advanced realization of our cryptosystem is presented which achieves enough high power and time trace entropies to block various kinds of power analysis attacks in the DES algorithm. We observed 27% energy reduction and 16% time overhead in these algorithms. Finally, DVFS hardness analysis is presented.

AB - This article proposes a novel approach to cryptosystem design to prevent power analysis attacks. Such attacks infer program behavior by continuously monitoring the power supply current going into the processor core. They form an important class of security attacks. Our approach is based on dynamic voltage and frequency scaling (DVFS), which hides processor state to make it harder for an attacker to gain access to a secure system. Three designs are studied to test the efficacy of the DVFS method against power analysis attacks. The advanced realization of our cryptosystem is presented which achieves enough high power and time trace entropies to block various kinds of power analysis attacks in the DES algorithm. We observed 27% energy reduction and 16% time overhead in these algorithms. Finally, DVFS hardness analysis is presented.

UR - http://www.scopus.com/inward/record.url?scp=84870176730&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84870176730&partnerID=8YFLogxK

U2 - 10.1145/2345770.2345774

DO - 10.1145/2345770.2345774

M3 - Article

VL - 11

JO - ACM Transactions on Embedded Computing Systems

JF - ACM Transactions on Embedded Computing Systems

SN - 1539-9087

IS - 3

M1 - 2345774

ER -