PDL++--An optimizing generator language for register transfer design

Richard J. Lipton, Dimitrios N. Serpanos, Wayne H. Wolf

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

PDL++, an optimizing generator language for register transfer systems lets users write C++ programs that generate register transfer machines and optimize the logic design using misII. It is shown that a register transfer generator language greatly simplifies the description of many sequential systems, mainly because it frees the designer from worrying about design optimization and makes the generating process more natural: the generator program is often nearly identical to the program which computes the function itself.

Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherPubl by IEEE
Pages1135-1138
Number of pages4
Volume2
Publication statusPublished - 1990
Externally publishedYes
Event1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4) - New Orleans, LA, USA
Duration: 1 May 19903 May 1990

Other

Other1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4)
CityNew Orleans, LA, USA
Period1/5/903/5/90

Fingerprint

Logic design
Automatic programming
Design optimization

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Lipton, R. J., Serpanos, D. N., & Wolf, W. H. (1990). PDL++--An optimizing generator language for register transfer design. In Proceedings - IEEE International Symposium on Circuits and Systems (Vol. 2, pp. 1135-1138). Publ by IEEE.

PDL++--An optimizing generator language for register transfer design. / Lipton, Richard J.; Serpanos, Dimitrios N.; Wolf, Wayne H.

Proceedings - IEEE International Symposium on Circuits and Systems. Vol. 2 Publ by IEEE, 1990. p. 1135-1138.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lipton, RJ, Serpanos, DN & Wolf, WH 1990, PDL++--An optimizing generator language for register transfer design. in Proceedings - IEEE International Symposium on Circuits and Systems. vol. 2, Publ by IEEE, pp. 1135-1138, 1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4), New Orleans, LA, USA, 1/5/90.
Lipton RJ, Serpanos DN, Wolf WH. PDL++--An optimizing generator language for register transfer design. In Proceedings - IEEE International Symposium on Circuits and Systems. Vol. 2. Publ by IEEE. 1990. p. 1135-1138
Lipton, Richard J. ; Serpanos, Dimitrios N. ; Wolf, Wayne H. / PDL++--An optimizing generator language for register transfer design. Proceedings - IEEE International Symposium on Circuits and Systems. Vol. 2 Publ by IEEE, 1990. pp. 1135-1138
@inproceedings{965c9ca9a7b74c228278389b5cc62447,
title = "PDL++--An optimizing generator language for register transfer design",
abstract = "PDL++, an optimizing generator language for register transfer systems lets users write C++ programs that generate register transfer machines and optimize the logic design using misII. It is shown that a register transfer generator language greatly simplifies the description of many sequential systems, mainly because it frees the designer from worrying about design optimization and makes the generating process more natural: the generator program is often nearly identical to the program which computes the function itself.",
author = "Lipton, {Richard J.} and Serpanos, {Dimitrios N.} and Wolf, {Wayne H.}",
year = "1990",
language = "English",
volume = "2",
pages = "1135--1138",
booktitle = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Publ by IEEE",

}

TY - GEN

T1 - PDL++--An optimizing generator language for register transfer design

AU - Lipton, Richard J.

AU - Serpanos, Dimitrios N.

AU - Wolf, Wayne H.

PY - 1990

Y1 - 1990

N2 - PDL++, an optimizing generator language for register transfer systems lets users write C++ programs that generate register transfer machines and optimize the logic design using misII. It is shown that a register transfer generator language greatly simplifies the description of many sequential systems, mainly because it frees the designer from worrying about design optimization and makes the generating process more natural: the generator program is often nearly identical to the program which computes the function itself.

AB - PDL++, an optimizing generator language for register transfer systems lets users write C++ programs that generate register transfer machines and optimize the logic design using misII. It is shown that a register transfer generator language greatly simplifies the description of many sequential systems, mainly because it frees the designer from worrying about design optimization and makes the generating process more natural: the generator program is often nearly identical to the program which computes the function itself.

UR - http://www.scopus.com/inward/record.url?scp=0025596118&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0025596118&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0025596118

VL - 2

SP - 1135

EP - 1138

BT - Proceedings - IEEE International Symposium on Circuits and Systems

PB - Publ by IEEE

ER -