PDL++--An optimizing generator language for register transfer design

Richard J. Lipton, Dimitrios N. Serpanos, Wayne H. Wolf

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

PDL++, an optimizing generator language for register transfer systems lets users write C++ programs that generate register transfer machines and optimize the logic design using misII. It is shown that a register transfer generator language greatly simplifies the description of many sequential systems, mainly because it frees the designer from worrying about design optimization and makes the generating process more natural: the generator program is often nearly identical to the program which computes the function itself.

Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherPubl by IEEE
Pages1135-1138
Number of pages4
Volume2
Publication statusPublished - 1990
Externally publishedYes
Event1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4) - New Orleans, LA, USA
Duration: 1 May 19903 May 1990

Other

Other1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4)
CityNew Orleans, LA, USA
Period1/5/903/5/90

    Fingerprint

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Lipton, R. J., Serpanos, D. N., & Wolf, W. H. (1990). PDL++--An optimizing generator language for register transfer design. In Proceedings - IEEE International Symposium on Circuits and Systems (Vol. 2, pp. 1135-1138). Publ by IEEE.