Parallel architecture for large scale production systems

K. W. Hwang, J. Tan, J. H. Wang, Jaideep Srivastava, W. T. Tsai

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

The authors present an architecture, suitable for implementation on a shared memory multiprocessor system, in which all the phases can run in parallel. Running multiple match, execution, and select phases causes subtle synchronization problems, which if not resolved can lead to altered semantics. The proposed architecture uses a lock and interference manager and a scheduler to resolve the possible synchronization conflicts. A new lock which provides concurrency beyond the standard two-phase locking in databases is used. The conflict resolution phase has been formalized as a scheduling problem. The approach taken is conservative in the sense that the scheduler performs careful analysis (interference avoidance and abort avoidance tests) to prevent interference, abort, and blocking.

Original languageEnglish
Title of host publicationIEEE Int Workshop Tools Artif Intell Archit Lang Algorithms
Editors Anon
Place of PublicationPiscataway, NJ, United States
PublisherPubl by IEEE
Pages27-33
Number of pages7
ISBN (Print)0818619848
Publication statusPublished - 1989
Externally publishedYes
EventIEEE International Workshop on Tools for Artificial Intelligence: Architectures, Languages and Algorithms - Fairfax, VA, USA
Duration: 23 Oct 198925 Oct 1989

Other

OtherIEEE International Workshop on Tools for Artificial Intelligence: Architectures, Languages and Algorithms
CityFairfax, VA, USA
Period23/10/8925/10/89

Fingerprint

Parallel architectures
Synchronization
Managers
Semantics
Scheduling
Data storage equipment

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Hwang, K. W., Tan, J., Wang, J. H., Srivastava, J., & Tsai, W. T. (1989). Parallel architecture for large scale production systems. In Anon (Ed.), IEEE Int Workshop Tools Artif Intell Archit Lang Algorithms (pp. 27-33). Piscataway, NJ, United States: Publ by IEEE.

Parallel architecture for large scale production systems. / Hwang, K. W.; Tan, J.; Wang, J. H.; Srivastava, Jaideep; Tsai, W. T.

IEEE Int Workshop Tools Artif Intell Archit Lang Algorithms. ed. / Anon. Piscataway, NJ, United States : Publ by IEEE, 1989. p. 27-33.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hwang, KW, Tan, J, Wang, JH, Srivastava, J & Tsai, WT 1989, Parallel architecture for large scale production systems. in Anon (ed.), IEEE Int Workshop Tools Artif Intell Archit Lang Algorithms. Publ by IEEE, Piscataway, NJ, United States, pp. 27-33, IEEE International Workshop on Tools for Artificial Intelligence: Architectures, Languages and Algorithms, Fairfax, VA, USA, 23/10/89.
Hwang KW, Tan J, Wang JH, Srivastava J, Tsai WT. Parallel architecture for large scale production systems. In Anon, editor, IEEE Int Workshop Tools Artif Intell Archit Lang Algorithms. Piscataway, NJ, United States: Publ by IEEE. 1989. p. 27-33
Hwang, K. W. ; Tan, J. ; Wang, J. H. ; Srivastava, Jaideep ; Tsai, W. T. / Parallel architecture for large scale production systems. IEEE Int Workshop Tools Artif Intell Archit Lang Algorithms. editor / Anon. Piscataway, NJ, United States : Publ by IEEE, 1989. pp. 27-33
@inproceedings{3b7c8742799c4ddcae3d602d27f650d6,
title = "Parallel architecture for large scale production systems",
abstract = "The authors present an architecture, suitable for implementation on a shared memory multiprocessor system, in which all the phases can run in parallel. Running multiple match, execution, and select phases causes subtle synchronization problems, which if not resolved can lead to altered semantics. The proposed architecture uses a lock and interference manager and a scheduler to resolve the possible synchronization conflicts. A new lock which provides concurrency beyond the standard two-phase locking in databases is used. The conflict resolution phase has been formalized as a scheduling problem. The approach taken is conservative in the sense that the scheduler performs careful analysis (interference avoidance and abort avoidance tests) to prevent interference, abort, and blocking.",
author = "Hwang, {K. W.} and J. Tan and Wang, {J. H.} and Jaideep Srivastava and Tsai, {W. T.}",
year = "1989",
language = "English",
isbn = "0818619848",
pages = "27--33",
editor = "Anon",
booktitle = "IEEE Int Workshop Tools Artif Intell Archit Lang Algorithms",
publisher = "Publ by IEEE",

}

TY - GEN

T1 - Parallel architecture for large scale production systems

AU - Hwang, K. W.

AU - Tan, J.

AU - Wang, J. H.

AU - Srivastava, Jaideep

AU - Tsai, W. T.

PY - 1989

Y1 - 1989

N2 - The authors present an architecture, suitable for implementation on a shared memory multiprocessor system, in which all the phases can run in parallel. Running multiple match, execution, and select phases causes subtle synchronization problems, which if not resolved can lead to altered semantics. The proposed architecture uses a lock and interference manager and a scheduler to resolve the possible synchronization conflicts. A new lock which provides concurrency beyond the standard two-phase locking in databases is used. The conflict resolution phase has been formalized as a scheduling problem. The approach taken is conservative in the sense that the scheduler performs careful analysis (interference avoidance and abort avoidance tests) to prevent interference, abort, and blocking.

AB - The authors present an architecture, suitable for implementation on a shared memory multiprocessor system, in which all the phases can run in parallel. Running multiple match, execution, and select phases causes subtle synchronization problems, which if not resolved can lead to altered semantics. The proposed architecture uses a lock and interference manager and a scheduler to resolve the possible synchronization conflicts. A new lock which provides concurrency beyond the standard two-phase locking in databases is used. The conflict resolution phase has been formalized as a scheduling problem. The approach taken is conservative in the sense that the scheduler performs careful analysis (interference avoidance and abort avoidance tests) to prevent interference, abort, and blocking.

UR - http://www.scopus.com/inward/record.url?scp=0024878699&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0024878699&partnerID=8YFLogxK

M3 - Conference contribution

SN - 0818619848

SP - 27

EP - 33

BT - IEEE Int Workshop Tools Artif Intell Archit Lang Algorithms

A2 - Anon, null

PB - Publ by IEEE

CY - Piscataway, NJ, United States

ER -