Optimal VLSI Sorting with Reduced Number of Processors

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Abstract

This paper presents a new parallel architecture having p processors and N = n2 memory locations, each consisting of 2s bits. The proposed organization can sort N s -bit numbers, where s = O((1+ ε) logN), e > 0, in time t = O for p in the range 1 to √Nlog √N. This result is optimal in the sense that the product of the number of processors and the parallel sorting time is equal to the sequential complexity of sorting. Also, the constant factors involved in the algorithm complexity are relatively small. When p = √Nlog√N, the time required for sorting N numbers on the proposed organization is O(√N), which is the same time required by a two-dimensional mesh array, a mesh of trees organization, or a pyramid computer, all with O(N) processors, to sort N numbers.

Original languageEnglish
Pages (from-to)105-110
Number of pages6
JournalIEEE Transactions on Computers
Volume40
Issue number1
DOIs
Publication statusPublished - Jan 1991

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Keywords

  • Optimal parallel algorithms
  • optimal sorting
  • proces-
  • reduced VLSI architectures
  • row-column sorting
  • sor-time tradeoffs
  • techniques

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computational Theory and Mathematics

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