### Abstract

The author presents novel designs of optimal VLSI sorters which combine rotate-sort with enumeration-sort. One major contribution of the present work is the development of an efficient index-mapping methodology to construct simple reduced-area shuffle networks which are used to permute data between sorting stages. Moreover, the proposed networks which are used to permute data work are amenable to simple partitioning schemes resulting in multiple chip networks in which each chip has a small number of I/O (input/output) pins.

Original language | English |
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Title of host publication | Proc Supercomput 91 |

Publisher | Publ by IEEE |

Pages | 732-739 |

Number of pages | 8 |

ISBN (Print) | 0818621583 |

Publication status | Published - 1 Dec 1991 |

Externally published | Yes |

Event | Proceedings of Supercomputing '91 - Albuquerque, NM, USA Duration: 18 Nov 1991 → 22 Nov 1991 |

### Other

Other | Proceedings of Supercomputing '91 |
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City | Albuquerque, NM, USA |

Period | 18/11/91 → 22/11/91 |

### Fingerprint

### ASJC Scopus subject areas

- Engineering(all)

### Cite this

*Proc Supercomput 91*(pp. 732-739). Publ by IEEE.

**Optimal bounded-degree VLSI networks for sorting in a constant number of rounds.** / Alnuweiri, Hussein.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

*Proc Supercomput 91.*Publ by IEEE, pp. 732-739, Proceedings of Supercomputing '91, Albuquerque, NM, USA, 18/11/91.

}

TY - GEN

T1 - Optimal bounded-degree VLSI networks for sorting in a constant number of rounds

AU - Alnuweiri, Hussein

PY - 1991/12/1

Y1 - 1991/12/1

N2 - The author presents novel designs of optimal VLSI sorters which combine rotate-sort with enumeration-sort. One major contribution of the present work is the development of an efficient index-mapping methodology to construct simple reduced-area shuffle networks which are used to permute data between sorting stages. Moreover, the proposed networks which are used to permute data work are amenable to simple partitioning schemes resulting in multiple chip networks in which each chip has a small number of I/O (input/output) pins.

AB - The author presents novel designs of optimal VLSI sorters which combine rotate-sort with enumeration-sort. One major contribution of the present work is the development of an efficient index-mapping methodology to construct simple reduced-area shuffle networks which are used to permute data between sorting stages. Moreover, the proposed networks which are used to permute data work are amenable to simple partitioning schemes resulting in multiple chip networks in which each chip has a small number of I/O (input/output) pins.

UR - http://www.scopus.com/inward/record.url?scp=0026264266&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0026264266&partnerID=8YFLogxK

M3 - Conference contribution

SN - 0818621583

SP - 732

EP - 739

BT - Proc Supercomput 91

PB - Publ by IEEE

ER -