Multicast schedulers for ATM switches with multiple input queues

M. Gamvrili, D. N. Serpanos

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

The evolution of high-speed ATM switches demands the design of efficient, high-performance scheduling algorithms for multicast as well as unicast traffic. Unicast traffic scheduling has improved significantly by adopting the advanced input queuing (virtual output queuing) switch memory architecture. However, conventional multicast scheduling algorithms do not utilize effectively this memory organization and achieve considerably low throughput. In this paper, we present two multicast scheduling algorithms, LFINE and MuSe, that employ the advanced input queuing architecture. These algorithms achieve high throughputs by approximating the one provided by FINE introduced in [1] with a significantly lower implementation cost In addition they outperform most known alternative multicast scheduling algorithms, such as Tatra and Multicast Greedy. As the results show, both algorithms achieve higher throughput and lower mean packet delay over most alternatives, while providing enhanced characteristics.

Original languageEnglish
Title of host publicationProceedings of the Fourth IEEE International Symposium on Signal Processing and Information Technology, ISSPIT 2004
Pages377-380
Number of pages4
Publication statusPublished - 1 Dec 2004
Externally publishedYes
EventFourth IEEE International Symposium on Signal processing and Information Technology, ISSPIT 2004 - Rome, Italy
Duration: 18 Dec 200421 Dec 2004

Other

OtherFourth IEEE International Symposium on Signal processing and Information Technology, ISSPIT 2004
CountryItaly
CityRome
Period18/12/0421/12/04

Fingerprint

Automatic teller machines
Scheduling algorithms
Switches
Throughput
Memory architecture
Scheduling
Data storage equipment
Costs

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Gamvrili, M., & Serpanos, D. N. (2004). Multicast schedulers for ATM switches with multiple input queues. In Proceedings of the Fourth IEEE International Symposium on Signal Processing and Information Technology, ISSPIT 2004 (pp. 377-380)

Multicast schedulers for ATM switches with multiple input queues. / Gamvrili, M.; Serpanos, D. N.

Proceedings of the Fourth IEEE International Symposium on Signal Processing and Information Technology, ISSPIT 2004. 2004. p. 377-380.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Gamvrili, M & Serpanos, DN 2004, Multicast schedulers for ATM switches with multiple input queues. in Proceedings of the Fourth IEEE International Symposium on Signal Processing and Information Technology, ISSPIT 2004. pp. 377-380, Fourth IEEE International Symposium on Signal processing and Information Technology, ISSPIT 2004, Rome, Italy, 18/12/04.
Gamvrili M, Serpanos DN. Multicast schedulers for ATM switches with multiple input queues. In Proceedings of the Fourth IEEE International Symposium on Signal Processing and Information Technology, ISSPIT 2004. 2004. p. 377-380
Gamvrili, M. ; Serpanos, D. N. / Multicast schedulers for ATM switches with multiple input queues. Proceedings of the Fourth IEEE International Symposium on Signal Processing and Information Technology, ISSPIT 2004. 2004. pp. 377-380
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