Hardware acceleration for database systems using content addressable memories

Nagender Bandi, Sam Schneider, Divyakant Agrawal, Amr El Abbadi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

Research efforts in conventional CPU architectures over the past decade have focused primarily on performance enhancement. In contrast, the NPU (Network Processing Unit) architectures have evolved significantly. The memory hierarchy of a typical network router features a Content-Addressable Memory (CAM) interfacing with the NPU in the same way as a DRAM interfaces with a traditional CPU. CAM technology provides very fast constant-time lookups over large amounts of data and facilitates a wide range of novel high-speed networking solutions ranging from Packet Classification to Intrusion Detection. While these networking applications span an entirely different domain than the database applications, they share a common operation namely look-up. Whether it is a database selectivity or join query, the core of many important database operators involves looking-up for a particular data entry among huge amounts of data. In this paper, we investigate how CAM-based technology can help in addressing the existing memory hierarchy bottlenecks in database operations.

Original languageEnglish
Title of host publication1st International Workshop on Data Management on New Hardware, DaMoN 2005, Co-located with ACM SIGMOD/PODS 2005
DOIs
Publication statusPublished - 1 Dec 2005
Externally publishedYes
Event1st International Workshop on Data Management on New Hardware, DaMoN 2005, Co-located with ACM SIGMOD/PODS 2005 - Baltimore, MA, United States
Duration: 12 Jun 200512 Jun 2005

Other

Other1st International Workshop on Data Management on New Hardware, DaMoN 2005, Co-located with ACM SIGMOD/PODS 2005
CountryUnited States
CityBaltimore, MA
Period12/6/0512/6/05

Fingerprint

Associative storage
Hardware
Program processors
Data storage equipment
Dynamic random access storage
Intrusion detection
Processing
Routers
Interfaces (computer)
Data acquisition

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture

Cite this

Bandi, N., Schneider, S., Agrawal, D., & Abbadi, A. E. (2005). Hardware acceleration for database systems using content addressable memories. In 1st International Workshop on Data Management on New Hardware, DaMoN 2005, Co-located with ACM SIGMOD/PODS 2005 [1114262] https://doi.org/10.1145/1114252.1114262

Hardware acceleration for database systems using content addressable memories. / Bandi, Nagender; Schneider, Sam; Agrawal, Divyakant; Abbadi, Amr El.

1st International Workshop on Data Management on New Hardware, DaMoN 2005, Co-located with ACM SIGMOD/PODS 2005. 2005. 1114262.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bandi, N, Schneider, S, Agrawal, D & Abbadi, AE 2005, Hardware acceleration for database systems using content addressable memories. in 1st International Workshop on Data Management on New Hardware, DaMoN 2005, Co-located with ACM SIGMOD/PODS 2005., 1114262, 1st International Workshop on Data Management on New Hardware, DaMoN 2005, Co-located with ACM SIGMOD/PODS 2005, Baltimore, MA, United States, 12/6/05. https://doi.org/10.1145/1114252.1114262
Bandi N, Schneider S, Agrawal D, Abbadi AE. Hardware acceleration for database systems using content addressable memories. In 1st International Workshop on Data Management on New Hardware, DaMoN 2005, Co-located with ACM SIGMOD/PODS 2005. 2005. 1114262 https://doi.org/10.1145/1114252.1114262
Bandi, Nagender ; Schneider, Sam ; Agrawal, Divyakant ; Abbadi, Amr El. / Hardware acceleration for database systems using content addressable memories. 1st International Workshop on Data Management on New Hardware, DaMoN 2005, Co-located with ACM SIGMOD/PODS 2005. 2005.
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