FPGA implementation of Compressive Sampling for sensor network applications

Yan Wang, Amine Bermak, Farid Boussaid

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

This paper examines the implementation considerations of Compressive Sampling (CS) in Field Programmable Gate Array (FPGA) and proposes computation-free linear projection implementation for CS encoding in imaging applications. A simplified sensing matrix is implemented to eliminate the multiplication and summation processes in the sensing stage. This sensing paradigm does not require all pixels in an image to be fully captured before being projected into measurements. This is in contrast with the case when Gaussian or Noiselet sensing matrix is applied. Though the recovered image obtained by this work is 2.64dB lower in PSNR than that of the optimal Gaussian matrix, the problem of Saturation noise caused by significantly increased dynamic range of the measurements compared with the original pixel value could be avoided in the practical applications. This compressive sampling scheme is implemented in FPGA and is interfaced with a CMOS imager for experimental validation.

Original languageEnglish
Title of host publicationProceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010
Pages5-8
Number of pages4
DOIs
Publication statusPublished - 2010
Externally publishedYes
Event2nd Asia Symposium on Quality Electronic Design, ASQED 2010 - Penang, Malaysia
Duration: 3 Aug 20104 Aug 2010

Other

Other2nd Asia Symposium on Quality Electronic Design, ASQED 2010
CountryMalaysia
CityPenang
Period3/8/104/8/10

Fingerprint

Sensor networks
Field programmable gate arrays (FPGA)
Sampling
Pixels
Image sensors
Imaging techniques

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

Cite this

Wang, Y., Bermak, A., & Boussaid, F. (2010). FPGA implementation of Compressive Sampling for sensor network applications. In Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010 (pp. 5-8). [5548167] https://doi.org/10.1109/ASQED.2010.5548167

FPGA implementation of Compressive Sampling for sensor network applications. / Wang, Yan; Bermak, Amine; Boussaid, Farid.

Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010. 2010. p. 5-8 5548167.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Wang, Y, Bermak, A & Boussaid, F 2010, FPGA implementation of Compressive Sampling for sensor network applications. in Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010., 5548167, pp. 5-8, 2nd Asia Symposium on Quality Electronic Design, ASQED 2010, Penang, Malaysia, 3/8/10. https://doi.org/10.1109/ASQED.2010.5548167
Wang Y, Bermak A, Boussaid F. FPGA implementation of Compressive Sampling for sensor network applications. In Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010. 2010. p. 5-8. 5548167 https://doi.org/10.1109/ASQED.2010.5548167
Wang, Yan ; Bermak, Amine ; Boussaid, Farid. / FPGA implementation of Compressive Sampling for sensor network applications. Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010. 2010. pp. 5-8
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