Fast timing recovery for linearly and non-linearly modulated systems

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1 Citation (Scopus)

Abstract

Digital phase-lock loop (PLL) is often used for timing recovery. Some non-data-aided timing error detectors occasionally cause hangup problem in the digital PLL. In this paper we introduce a new two-step anti-hangup timing recovery scheme. By simulations, we show that this enhanced scheme greatly reduces the probability of hangup and speeds up timing recovery for both linearly and nonlinearly modulated systems.

Original languageEnglish
Pages (from-to)1015-1019
Number of pages5
JournalConference Record - Asilomar Conference on Signals, Systems and Computers
Volume1
Publication statusPublished - 2004
Externally publishedYes

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ASJC Scopus subject areas

  • Engineering(all)

Cite this

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title = "Fast timing recovery for linearly and non-linearly modulated systems",
abstract = "Digital phase-lock loop (PLL) is often used for timing recovery. Some non-data-aided timing error detectors occasionally cause hangup problem in the digital PLL. In this paper we introduce a new two-step anti-hangup timing recovery scheme. By simulations, we show that this enhanced scheme greatly reduces the probability of hangup and speeds up timing recovery for both linearly and nonlinearly modulated systems.",
author = "Kai Shi and Erchin Serpedin",
year = "2004",
language = "English",
volume = "1",
pages = "1015--1019",
journal = "Conference Record of the Asilomar Conference on Signals, Systems and Computers",
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AU - Shi, Kai

AU - Serpedin, Erchin

PY - 2004

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AB - Digital phase-lock loop (PLL) is often used for timing recovery. Some non-data-aided timing error detectors occasionally cause hangup problem in the digital PLL. In this paper we introduce a new two-step anti-hangup timing recovery scheme. By simulations, we show that this enhanced scheme greatly reduces the probability of hangup and speeds up timing recovery for both linearly and nonlinearly modulated systems.

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