Fast algorithms for image labeling on a reconfigurable network of processors

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

This paper presents constant-time algorithms for labeling the connected components of images on a network of processors with a wide reconfigurable bus. The algorithms are based on a processor indexing scheme which employs constant-weight codes. The use of such codes enables identifying a single representative processor for each component in a constant number of steps. The proposed algorithms can label an NN image or an N-vertex graph in O(1) time using Theta (N 2 ) processors, which is optimal. Furthermore, the proposed techniques lead to O(log N/log log N)-time labeling algorithms on a network of N 2 processors with a reconfigurable bus of width O(log N) bits.

Original languageEnglish
Title of host publicationProceedings of 7th International Parallel Processing Symposium, IPPS 1993
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages569-575
Number of pages7
ISBN (Electronic)0818634421, 9780818634420
DOIs
Publication statusPublished - 1 Jan 1993
Event7th International Parallel Processing Symposium, IPPS 1993 - Newport, United States
Duration: 13 Apr 199316 Apr 1993

Publication series

NameProceedings of 7th International Parallel Processing Symposium, IPPS 1993

Conference

Conference7th International Parallel Processing Symposium, IPPS 1993
CountryUnited States
CityNewport
Period13/4/9316/4/93

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ASJC Scopus subject areas

  • Computer Science Applications
  • Hardware and Architecture
  • Software
  • Computational Theory and Mathematics
  • Computer Networks and Communications

Cite this

Alnuweiri, H. (1993). Fast algorithms for image labeling on a reconfigurable network of processors. In Proceedings of 7th International Parallel Processing Symposium, IPPS 1993 (pp. 569-575). [262816] (Proceedings of 7th International Parallel Processing Symposium, IPPS 1993). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IPPS.1993.262816

Fast algorithms for image labeling on a reconfigurable network of processors. / Alnuweiri, Hussein.

Proceedings of 7th International Parallel Processing Symposium, IPPS 1993. Institute of Electrical and Electronics Engineers Inc., 1993. p. 569-575 262816 (Proceedings of 7th International Parallel Processing Symposium, IPPS 1993).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Alnuweiri, H 1993, Fast algorithms for image labeling on a reconfigurable network of processors. in Proceedings of 7th International Parallel Processing Symposium, IPPS 1993., 262816, Proceedings of 7th International Parallel Processing Symposium, IPPS 1993, Institute of Electrical and Electronics Engineers Inc., pp. 569-575, 7th International Parallel Processing Symposium, IPPS 1993, Newport, United States, 13/4/93. https://doi.org/10.1109/IPPS.1993.262816
Alnuweiri H. Fast algorithms for image labeling on a reconfigurable network of processors. In Proceedings of 7th International Parallel Processing Symposium, IPPS 1993. Institute of Electrical and Electronics Engineers Inc. 1993. p. 569-575. 262816. (Proceedings of 7th International Parallel Processing Symposium, IPPS 1993). https://doi.org/10.1109/IPPS.1993.262816
Alnuweiri, Hussein. / Fast algorithms for image labeling on a reconfigurable network of processors. Proceedings of 7th International Parallel Processing Symposium, IPPS 1993. Institute of Electrical and Electronics Engineers Inc., 1993. pp. 569-575 (Proceedings of 7th International Parallel Processing Symposium, IPPS 1993).
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