Embedding large multidimensional DSP computations in reconfigurable logic

Ayman Elnaggar, Hussein Alnuweiri, Mabo R. Ito

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents an efficient methodology for decomposing and modularizing large computations so that they can be easily mapped onto FPGAs and other programmable logic structures. The paper focuses on the multidimensional discrete cosine transform (DCT). The main advantage of the proposed decomposition strategy is that it enables constructing large m-dimensional DCTs from a single stage of smaller size m-dimensional DCTs. We demonstrate the power of our technique by mapping 2-d DCT computations of various sizes on an FPGA-based transformable computer and report their performance (both in terms of speed and gate utilization).

Original languageEnglish
Title of host publicationProceedings of SPIE - The International Society for Optical Engineering
EditorsJohn Schewel, Peter M. Athanas, V.Michael Jr. Bove, John Watson
Pages300-307
Number of pages8
Volume2914
Publication statusPublished - 1 Dec 1996
Externally publishedYes
EventHigh-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic - Boston, MA, USA
Duration: 20 Nov 199621 Nov 1996

Other

OtherHigh-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic
CityBoston, MA, USA
Period20/11/9621/11/96

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ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Computer Science Applications
  • Applied Mathematics
  • Electrical and Electronic Engineering

Cite this

Elnaggar, A., Alnuweiri, H., & Ito, M. R. (1996). Embedding large multidimensional DSP computations in reconfigurable logic. In J. Schewel, P. M. Athanas, V. M. J. Bove, & J. Watson (Eds.), Proceedings of SPIE - The International Society for Optical Engineering (Vol. 2914, pp. 300-307)