Efficient modular interconnection networks for digital filtering and convolution

A. Elnaggar, Hussein Alnuweiri, M. R. Ito

Research output: Contribution to conferencePaper

Abstract

This paper presents novel VLSI interconnection schemes that can be used to `modularize' parallel convolution circuits. Our methodology implements Toom's algorithm and is based on tensor product factorization of linear convolution into three cascaded stages. The resulting networks have very simple modular structure and highly regular topology. Additionally, the proposed networks have very small depth since only a single stage contains multipliers, while the other two stages contain adders only.

Original languageEnglish
Pages264-267
Number of pages4
Publication statusPublished - 1 Jan 1995
Externally publishedYes
EventProceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Victoria, BC, Can
Duration: 17 May 199519 May 1995

Other

OtherProceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing
CityVictoria, BC, Can
Period17/5/9519/5/95

Fingerprint

Convolution
Adders
Factorization
Tensors
Topology
Networks (circuits)

ASJC Scopus subject areas

  • Signal Processing
  • Computer Networks and Communications

Cite this

Elnaggar, A., Alnuweiri, H., & Ito, M. R. (1995). Efficient modular interconnection networks for digital filtering and convolution. 264-267. Paper presented at Proceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing, Victoria, BC, Can, .

Efficient modular interconnection networks for digital filtering and convolution. / Elnaggar, A.; Alnuweiri, Hussein; Ito, M. R.

1995. 264-267 Paper presented at Proceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing, Victoria, BC, Can, .

Research output: Contribution to conferencePaper

Elnaggar, A, Alnuweiri, H & Ito, MR 1995, 'Efficient modular interconnection networks for digital filtering and convolution' Paper presented at Proceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing, Victoria, BC, Can, 17/5/95 - 19/5/95, pp. 264-267.
Elnaggar A, Alnuweiri H, Ito MR. Efficient modular interconnection networks for digital filtering and convolution. 1995. Paper presented at Proceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing, Victoria, BC, Can, .
Elnaggar, A. ; Alnuweiri, Hussein ; Ito, M. R. / Efficient modular interconnection networks for digital filtering and convolution. Paper presented at Proceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing, Victoria, BC, Can, .4 p.
@conference{2bde28315fe64c74960c7da72a2de2c2,
title = "Efficient modular interconnection networks for digital filtering and convolution",
abstract = "This paper presents novel VLSI interconnection schemes that can be used to `modularize' parallel convolution circuits. Our methodology implements Toom's algorithm and is based on tensor product factorization of linear convolution into three cascaded stages. The resulting networks have very simple modular structure and highly regular topology. Additionally, the proposed networks have very small depth since only a single stage contains multipliers, while the other two stages contain adders only.",
author = "A. Elnaggar and Hussein Alnuweiri and Ito, {M. R.}",
year = "1995",
month = "1",
day = "1",
language = "English",
pages = "264--267",
note = "Proceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing ; Conference date: 17-05-1995 Through 19-05-1995",

}

TY - CONF

T1 - Efficient modular interconnection networks for digital filtering and convolution

AU - Elnaggar, A.

AU - Alnuweiri, Hussein

AU - Ito, M. R.

PY - 1995/1/1

Y1 - 1995/1/1

N2 - This paper presents novel VLSI interconnection schemes that can be used to `modularize' parallel convolution circuits. Our methodology implements Toom's algorithm and is based on tensor product factorization of linear convolution into three cascaded stages. The resulting networks have very simple modular structure and highly regular topology. Additionally, the proposed networks have very small depth since only a single stage contains multipliers, while the other two stages contain adders only.

AB - This paper presents novel VLSI interconnection schemes that can be used to `modularize' parallel convolution circuits. Our methodology implements Toom's algorithm and is based on tensor product factorization of linear convolution into three cascaded stages. The resulting networks have very simple modular structure and highly regular topology. Additionally, the proposed networks have very small depth since only a single stage contains multipliers, while the other two stages contain adders only.

UR - http://www.scopus.com/inward/record.url?scp=0029223394&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0029223394&partnerID=8YFLogxK

M3 - Paper

SP - 264

EP - 267

ER -