Dynamic voltage and frequency scaling for low-power multi-precision reconfigurable multiplier

Xiaoxiao Zhang, Amine Bermak, Farid Boussaid

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

In this paper, a 32x32-bit low power multi-precision multiplier is described, in which each building block can be either an independent smaller-precision multiplier or work in parallel to perform higher-precision operations. The proposed multi-precision multiplier enables voltage and frequency scaling for low power operation, while still maintaining full throughput. According to user's arbitrary throughput requirements, the highly dynamic voltage and frequency scaling circuits can autonomously configure the multiplier to operate with the lowest possible voltage and frequency to achieve the lowest power consumption. By carrying out optimizations at the algorithmic and architectural levels, we have completely removed silicon area and power overheads which is always associated with the reconfigurability features. The 32x32-bit low power multiprecision multiplier has been implemented in TSMC 0.18 μm technology. Compared with fixed-width multipliers, the proposed design features around 13.8% and 30% reduction in circuit area and power, respectively. Multi-precision processing featured in this paper accordingly enables voltage and frequency scaling resulting in up to 68% reduction in power consumption.

Original languageEnglish
Title of host publicationISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems
Pages45-48
Number of pages4
DOIs
Publication statusPublished - 2010
Externally publishedYes
Event2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010 - Paris, France
Duration: 30 May 20102 Jun 2010

Other

Other2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010
CountryFrance
CityParis
Period30/5/102/6/10

Fingerprint

Electric potential
Electric power utilization
Throughput
Networks (circuits)
Silicon
Processing
Voltage scaling
Dynamic frequency scaling

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Zhang, X., Bermak, A., & Boussaid, F. (2010). Dynamic voltage and frequency scaling for low-power multi-precision reconfigurable multiplier. In ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems (pp. 45-48). [5537095] https://doi.org/10.1109/ISCAS.2010.5537095

Dynamic voltage and frequency scaling for low-power multi-precision reconfigurable multiplier. / Zhang, Xiaoxiao; Bermak, Amine; Boussaid, Farid.

ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems. 2010. p. 45-48 5537095.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Zhang, X, Bermak, A & Boussaid, F 2010, Dynamic voltage and frequency scaling for low-power multi-precision reconfigurable multiplier. in ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems., 5537095, pp. 45-48, 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010, Paris, France, 30/5/10. https://doi.org/10.1109/ISCAS.2010.5537095
Zhang X, Bermak A, Boussaid F. Dynamic voltage and frequency scaling for low-power multi-precision reconfigurable multiplier. In ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems. 2010. p. 45-48. 5537095 https://doi.org/10.1109/ISCAS.2010.5537095
Zhang, Xiaoxiao ; Bermak, Amine ; Boussaid, Farid. / Dynamic voltage and frequency scaling for low-power multi-precision reconfigurable multiplier. ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems. 2010. pp. 45-48
@inproceedings{a56d5f57e0b94b2097466d096df8c502,
title = "Dynamic voltage and frequency scaling for low-power multi-precision reconfigurable multiplier",
abstract = "In this paper, a 32x32-bit low power multi-precision multiplier is described, in which each building block can be either an independent smaller-precision multiplier or work in parallel to perform higher-precision operations. The proposed multi-precision multiplier enables voltage and frequency scaling for low power operation, while still maintaining full throughput. According to user's arbitrary throughput requirements, the highly dynamic voltage and frequency scaling circuits can autonomously configure the multiplier to operate with the lowest possible voltage and frequency to achieve the lowest power consumption. By carrying out optimizations at the algorithmic and architectural levels, we have completely removed silicon area and power overheads which is always associated with the reconfigurability features. The 32x32-bit low power multiprecision multiplier has been implemented in TSMC 0.18 μm technology. Compared with fixed-width multipliers, the proposed design features around 13.8{\%} and 30{\%} reduction in circuit area and power, respectively. Multi-precision processing featured in this paper accordingly enables voltage and frequency scaling resulting in up to 68{\%} reduction in power consumption.",
author = "Xiaoxiao Zhang and Amine Bermak and Farid Boussaid",
year = "2010",
doi = "10.1109/ISCAS.2010.5537095",
language = "English",
isbn = "9781424453085",
pages = "45--48",
booktitle = "ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems",

}

TY - GEN

T1 - Dynamic voltage and frequency scaling for low-power multi-precision reconfigurable multiplier

AU - Zhang, Xiaoxiao

AU - Bermak, Amine

AU - Boussaid, Farid

PY - 2010

Y1 - 2010

N2 - In this paper, a 32x32-bit low power multi-precision multiplier is described, in which each building block can be either an independent smaller-precision multiplier or work in parallel to perform higher-precision operations. The proposed multi-precision multiplier enables voltage and frequency scaling for low power operation, while still maintaining full throughput. According to user's arbitrary throughput requirements, the highly dynamic voltage and frequency scaling circuits can autonomously configure the multiplier to operate with the lowest possible voltage and frequency to achieve the lowest power consumption. By carrying out optimizations at the algorithmic and architectural levels, we have completely removed silicon area and power overheads which is always associated with the reconfigurability features. The 32x32-bit low power multiprecision multiplier has been implemented in TSMC 0.18 μm technology. Compared with fixed-width multipliers, the proposed design features around 13.8% and 30% reduction in circuit area and power, respectively. Multi-precision processing featured in this paper accordingly enables voltage and frequency scaling resulting in up to 68% reduction in power consumption.

AB - In this paper, a 32x32-bit low power multi-precision multiplier is described, in which each building block can be either an independent smaller-precision multiplier or work in parallel to perform higher-precision operations. The proposed multi-precision multiplier enables voltage and frequency scaling for low power operation, while still maintaining full throughput. According to user's arbitrary throughput requirements, the highly dynamic voltage and frequency scaling circuits can autonomously configure the multiplier to operate with the lowest possible voltage and frequency to achieve the lowest power consumption. By carrying out optimizations at the algorithmic and architectural levels, we have completely removed silicon area and power overheads which is always associated with the reconfigurability features. The 32x32-bit low power multiprecision multiplier has been implemented in TSMC 0.18 μm technology. Compared with fixed-width multipliers, the proposed design features around 13.8% and 30% reduction in circuit area and power, respectively. Multi-precision processing featured in this paper accordingly enables voltage and frequency scaling resulting in up to 68% reduction in power consumption.

UR - http://www.scopus.com/inward/record.url?scp=77955991763&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77955991763&partnerID=8YFLogxK

U2 - 10.1109/ISCAS.2010.5537095

DO - 10.1109/ISCAS.2010.5537095

M3 - Conference contribution

SN - 9781424453085

SP - 45

EP - 48

BT - ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems

ER -