Credit-flow-controlled ATM for MP interconnection

The ATLAS I single-chip ATM switch

Manolis Katevenis, Dimitrios Serpanos, Emmanuel Spyridakis

Research output: Chapter in Book/Report/Conference proceedingConference contribution

18 Citations (Scopus)

Abstract

Multiprocessing (MP) on networks of workstations (NOW) is a high-performance computing architecture of growing importance. In traditional MP's, wormhole routing interconnection networks use fixed-size flits and backpressure. In NOW's, ATM -one of the major contending interconnection technologies- uses fixed-size cells, while backpressure can be added to it. We argue that ATM with backpressure has interesting similarities with wormhole routing. We are implementing ATLAS I, a single-chip gigabit ATM switch, which includes credit flow control (backpressure), according to a protocol resembling Quantum Flow Control (QFC). We show by simulation that this protocol performs better than the traditional multi-lane wormhole protocol: high throughput and low latency are provided with less buffer space. Also, ATLAS I demonstrates little sensitivity to bursty traffic, and, unlike wormhole, it is fair in terms of latency in hot-spot configurations. We use detailed switch models, operating at clock-cycle granularity.

Original languageEnglish
Title of host publicationIEEE High-Performance Computer Architecture Symposium Proceedings
Place of PublicationLos Alamitos, CA, United States
PublisherInstitute of Electrical and Electronics Engineers Computer Society
Pages47-56
Number of pages10
Publication statusPublished - 1 Jan 1998
Externally publishedYes
EventProceedings of the 1998 4th International Symposium on High-Performance Computer Architecture, HPCA - Las Vegas, NV, USA
Duration: 31 Jan 19984 Feb 1998

Other

OtherProceedings of the 1998 4th International Symposium on High-Performance Computer Architecture, HPCA
CityLas Vegas, NV, USA
Period31/1/984/2/98

Fingerprint

Automatic teller machines
Switches
Flow control
Computer workstations
Clocks
Throughput

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Katevenis, M., Serpanos, D., & Spyridakis, E. (1998). Credit-flow-controlled ATM for MP interconnection: The ATLAS I single-chip ATM switch. In IEEE High-Performance Computer Architecture Symposium Proceedings (pp. 47-56). Los Alamitos, CA, United States: Institute of Electrical and Electronics Engineers Computer Society.

Credit-flow-controlled ATM for MP interconnection : The ATLAS I single-chip ATM switch. / Katevenis, Manolis; Serpanos, Dimitrios; Spyridakis, Emmanuel.

IEEE High-Performance Computer Architecture Symposium Proceedings. Los Alamitos, CA, United States : Institute of Electrical and Electronics Engineers Computer Society, 1998. p. 47-56.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Katevenis, M, Serpanos, D & Spyridakis, E 1998, Credit-flow-controlled ATM for MP interconnection: The ATLAS I single-chip ATM switch. in IEEE High-Performance Computer Architecture Symposium Proceedings. Institute of Electrical and Electronics Engineers Computer Society, Los Alamitos, CA, United States, pp. 47-56, Proceedings of the 1998 4th International Symposium on High-Performance Computer Architecture, HPCA, Las Vegas, NV, USA, 31/1/98.
Katevenis M, Serpanos D, Spyridakis E. Credit-flow-controlled ATM for MP interconnection: The ATLAS I single-chip ATM switch. In IEEE High-Performance Computer Architecture Symposium Proceedings. Los Alamitos, CA, United States: Institute of Electrical and Electronics Engineers Computer Society. 1998. p. 47-56
Katevenis, Manolis ; Serpanos, Dimitrios ; Spyridakis, Emmanuel. / Credit-flow-controlled ATM for MP interconnection : The ATLAS I single-chip ATM switch. IEEE High-Performance Computer Architecture Symposium Proceedings. Los Alamitos, CA, United States : Institute of Electrical and Electronics Engineers Computer Society, 1998. pp. 47-56
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