Continuous-time ΣΔ ADC with implicit variable gain amplifier for CMOS image sensor

Fang Tang, Amine Bermak, Amira Abbes, Mohieddine Amor Benammar

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Abstract

This paper presents a column-parallel continuous-time sigma delta (CTSD) ADC for mega-pixel resolution CMOS image sensor (CIS). The sigma delta modulator is implemented with a 2nd order resistor/capacitor-based loop filter. The first integrator uses a conventional operational transconductance amplifier (OTA), for the concern of a high power noise rejection. The second integrator is realized with a single-ended inverter-based amplifier, instead of a standard OTA. As a result, the power consumption is reduced, without sacrificing the noise performance. Moreover, the variable gain amplifier in the traditional column-parallel read-out circuit is merged into the front-end of the CTSD modulator. By programming the input resistance, the amplitude range of the input current can be tuned with 8 scales, which is equivalent to a traditional 2-bit preamplification function without consuming extra power and chip area. The test chip prototype is fabricated using 0.18 m CMOS process and the measurement result shows an ADC power consumption lower than 63.5 W under 1.4 V power supply and 50 MHz clock frequency.

Original languageEnglish
Article number208540
JournalThe Scientific World Journal
Volume2014
DOIs
Publication statusPublished - 2014
Externally publishedYes

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ASJC Scopus subject areas

  • Biochemistry, Genetics and Molecular Biology(all)
  • Environmental Science(all)
  • Medicine(all)

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