Cascaded classification for hardware face detection

Irene Zheng, Xiaoxiao Zhang, Farid Flitti, Amine Bermak

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper presents a face detection hardware architecture which is based on a newly proposed algorithm using cascaded classifiers with vector angle similarity measurement between the investigated image and the face/non-face centroids. The proposed system is composed of three major modules: Best fit plane removal unit, Histogram equalization unit, and cascaded classification unit. Comprehensive optimization at both the algorithmic and hardware levels has enabled performance improvement and area reduction. The vector angle similarity measure-based algorithm is employed to achieve acceptable classification accuracy and high-speed. The cascaded classification architecture is designed in a parallel mode to achieve low latency and low iteration time. The overall system was designed in VHDL and synthesized and implemented using Xilinx FPGA vertex4 family board. Experimental results on real-time captured face images prove the system reliability and achievement of real-time classification performance which is comparable to a software implementation while running at a frame rate of 63 frames per second at an image resolution of 64x64 pixels. The proposed architecture is scalable and can be extended to higher resolution.

Original languageEnglish
Title of host publication2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC
DOIs
Publication statusPublished - 2008
Externally publishedYes
Event2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC - Hong Kong, China
Duration: 8 Dec 200810 Dec 2008

Other

Other2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC
CountryChina
CityHong Kong
Period8/12/0810/12/08

Fingerprint

Face recognition
Hardware
Computer hardware description languages
Angle measurement
Image resolution
Field programmable gate arrays (FPGA)
Classifiers
Pixels

Keywords

  • Best fit plane removal
  • Classification
  • Face detection
  • FPGA
  • Histogram equalization

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Zheng, I., Zhang, X., Flitti, F., & Bermak, A. (2008). Cascaded classification for hardware face detection. In 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC [4760695] https://doi.org/10.1109/EDSSC.2008.4760695

Cascaded classification for hardware face detection. / Zheng, Irene; Zhang, Xiaoxiao; Flitti, Farid; Bermak, Amine.

2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC. 2008. 4760695.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Zheng, I, Zhang, X, Flitti, F & Bermak, A 2008, Cascaded classification for hardware face detection. in 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC., 4760695, 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC, Hong Kong, China, 8/12/08. https://doi.org/10.1109/EDSSC.2008.4760695
Zheng I, Zhang X, Flitti F, Bermak A. Cascaded classification for hardware face detection. In 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC. 2008. 4760695 https://doi.org/10.1109/EDSSC.2008.4760695
Zheng, Irene ; Zhang, Xiaoxiao ; Flitti, Farid ; Bermak, Amine. / Cascaded classification for hardware face detection. 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC. 2008.
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