Buffered fat-tree ATM switch

Hussein Alnuweiri, H. Aljunaidi, R. Beraldi

Research output: Contribution to conferencePaper

Abstract

This paper proposes a general class of scalable ATM switches based on a buffered fat-tree structures. A distinguishing feature of the proposed switches is that they have been designed to handle nonuniform (as well as uniform) traffic robustly while fully utilizing switch resources (buffers and bandwidth). The buffer-size and bandwidth of each stage of a switch are specified by parameters which can be computed to optimize the switch with respect to cost, utilization, cell-loss, and total delay. The paper also develops a discrete-time approximate model for analyzing the performance of the proposed switch. In particular, the analysis determines the influence of various design parameters on optimizing the switch performance. Additionally, the paper addresses the problem of dimensioning the switch to guarantee certain quality-of-service requirements while minimizing buffer-space and switch delays.

Original languageEnglish
Pages1209-1215
Number of pages7
Publication statusPublished - 1 Dec 1995
Externally publishedYes
EventProceedings of the 1995 IEEE Global Telecommunications Conference. Part 2 (of 3) - Singapore, Singapore
Duration: 14 Nov 199516 Nov 1995

Other

OtherProceedings of the 1995 IEEE Global Telecommunications Conference. Part 2 (of 3)
CitySingapore, Singapore
Period14/11/9516/11/95

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Global and Planetary Change

Cite this

Alnuweiri, H., Aljunaidi, H., & Beraldi, R. (1995). Buffered fat-tree ATM switch. 1209-1215. Paper presented at Proceedings of the 1995 IEEE Global Telecommunications Conference. Part 2 (of 3), Singapore, Singapore, .