An improved combined symbol and sampling clock synchronization method for OFDM systems

Baoguo Yang, Khaled Letaief, Roger S. Cheng, Zhigang Cao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

26 Citations (Scopus)

Abstract

In this paper, we present a delay-locked loop (DLL) technique for performing a combined symbol and sampling clock synchronization in orthogonal frequency division multiplexing (OFDM) systems. In addition, we propose a symbol timing acquisition algorithm for the DLL. It is shown that by using this combined scheme, we can achieve symbol timing recovery and sampling clock adjustment simultaneously. In particular, the symbol timing estimation error variance can be decreased by several orders of magnitude compared with the common correlation methods in both the AWGN and multipath fading channels.

Original languageEnglish
Title of host publication1999 IEEE Wireless Communications and Networking Conference, WCNC
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1153-1157
Number of pages5
Volume3
ISBN (Electronic)0780356683
DOIs
Publication statusPublished - 1999
Externally publishedYes
Event1st IEEE Annual Wireless Communications and Networking Conference, WCNC 1999 - New Orleans, United States
Duration: 21 Sep 199924 Sep 1999

Other

Other1st IEEE Annual Wireless Communications and Networking Conference, WCNC 1999
CountryUnited States
CityNew Orleans
Period21/9/9924/9/99

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ASJC Scopus subject areas

  • Engineering(all)

Cite this

Yang, B., Letaief, K., Cheng, R. S., & Cao, Z. (1999). An improved combined symbol and sampling clock synchronization method for OFDM systems. In 1999 IEEE Wireless Communications and Networking Conference, WCNC (Vol. 3, pp. 1153-1157). [796886] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/WCNC.1999.796886