A PWM DPS with pixel-level reconfigurable 4/8-bit counter/SRAM

Yat Fong Yung, Amine Bermak

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

In this paper, a pulse width modulation (PWM) digital pixel sensor (DPS) is presented. The pixel includes a novel pixel-level reconfigurable 4/8-bit counter/SRAM, which can operate as a 4-bit counter or as an 8-bit memory. In contrast to the conventional PWM DPS in which all the encoding data are provided by a global counter, in our DPS, for the 8-bit digital data encoding the photodiode current, 4 bits are obtained from this pixel-level counter and the other 4 bits are provided by a global counter. The number of global data buses is thus reduced which in turn reduces the global bus capacitance and ease the routing. Moreover, the pixel can operate in 8-bit or in 4-bit conversion mode. 8-bit conversion provides a normal high resolution imaging while 4-bit conversion provides a higher frame rate. The pixel sensor has been designed and fabricated in a 0.35μm CMOS technology and its operation will be demonstrated through experimental results. Each pixel occupies an area of 46μm × 48μm with a fill-factor of 14%.

Original languageEnglish
Article number1464947
Pages (from-to)1754-1757
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
DOIs
Publication statusPublished - 2005
Externally publishedYes

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Static random access storage
Pulse width modulation
Pixels
Sensors
Photodiodes
Capacitance
Imaging techniques
Data storage equipment

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

A PWM DPS with pixel-level reconfigurable 4/8-bit counter/SRAM. / Yung, Yat Fong; Bermak, Amine.

In: Proceedings - IEEE International Symposium on Circuits and Systems, 2005, p. 1754-1757.

Research output: Contribution to journalArticle

@article{ca9ec6565a3849e8bada6d694647e6f4,
title = "A PWM DPS with pixel-level reconfigurable 4/8-bit counter/SRAM",
abstract = "In this paper, a pulse width modulation (PWM) digital pixel sensor (DPS) is presented. The pixel includes a novel pixel-level reconfigurable 4/8-bit counter/SRAM, which can operate as a 4-bit counter or as an 8-bit memory. In contrast to the conventional PWM DPS in which all the encoding data are provided by a global counter, in our DPS, for the 8-bit digital data encoding the photodiode current, 4 bits are obtained from this pixel-level counter and the other 4 bits are provided by a global counter. The number of global data buses is thus reduced which in turn reduces the global bus capacitance and ease the routing. Moreover, the pixel can operate in 8-bit or in 4-bit conversion mode. 8-bit conversion provides a normal high resolution imaging while 4-bit conversion provides a higher frame rate. The pixel sensor has been designed and fabricated in a 0.35μm CMOS technology and its operation will be demonstrated through experimental results. Each pixel occupies an area of 46μm × 48μm with a fill-factor of 14{\%}.",
author = "Yung, {Yat Fong} and Amine Bermak",
year = "2005",
doi = "10.1109/ISCAS.2005.1464947",
language = "English",
pages = "1754--1757",
journal = "Proceedings - IEEE International Symposium on Circuits and Systems",
issn = "0271-4310",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - JOUR

T1 - A PWM DPS with pixel-level reconfigurable 4/8-bit counter/SRAM

AU - Yung, Yat Fong

AU - Bermak, Amine

PY - 2005

Y1 - 2005

N2 - In this paper, a pulse width modulation (PWM) digital pixel sensor (DPS) is presented. The pixel includes a novel pixel-level reconfigurable 4/8-bit counter/SRAM, which can operate as a 4-bit counter or as an 8-bit memory. In contrast to the conventional PWM DPS in which all the encoding data are provided by a global counter, in our DPS, for the 8-bit digital data encoding the photodiode current, 4 bits are obtained from this pixel-level counter and the other 4 bits are provided by a global counter. The number of global data buses is thus reduced which in turn reduces the global bus capacitance and ease the routing. Moreover, the pixel can operate in 8-bit or in 4-bit conversion mode. 8-bit conversion provides a normal high resolution imaging while 4-bit conversion provides a higher frame rate. The pixel sensor has been designed and fabricated in a 0.35μm CMOS technology and its operation will be demonstrated through experimental results. Each pixel occupies an area of 46μm × 48μm with a fill-factor of 14%.

AB - In this paper, a pulse width modulation (PWM) digital pixel sensor (DPS) is presented. The pixel includes a novel pixel-level reconfigurable 4/8-bit counter/SRAM, which can operate as a 4-bit counter or as an 8-bit memory. In contrast to the conventional PWM DPS in which all the encoding data are provided by a global counter, in our DPS, for the 8-bit digital data encoding the photodiode current, 4 bits are obtained from this pixel-level counter and the other 4 bits are provided by a global counter. The number of global data buses is thus reduced which in turn reduces the global bus capacitance and ease the routing. Moreover, the pixel can operate in 8-bit or in 4-bit conversion mode. 8-bit conversion provides a normal high resolution imaging while 4-bit conversion provides a higher frame rate. The pixel sensor has been designed and fabricated in a 0.35μm CMOS technology and its operation will be demonstrated through experimental results. Each pixel occupies an area of 46μm × 48μm with a fill-factor of 14%.

UR - http://www.scopus.com/inward/record.url?scp=34548812395&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=34548812395&partnerID=8YFLogxK

U2 - 10.1109/ISCAS.2005.1464947

DO - 10.1109/ISCAS.2005.1464947

M3 - Article

SP - 1754

EP - 1757

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

SN - 0271-4310

M1 - 1464947

ER -