A novel ultra-low power reset/read-out technique for megapixels current-mode CMOS imagers

Farid Boussaid, Amine Bermak, Abdesselam Bouzerdoum

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A novel reset/read-out technique is presented for current-mode ultra-low power megapixel CMOS imagers. In the proposed technique, the reset and readout phases occur simultaneously: as a single pixel is being read-out another pixel is being reset. Such a strategy is shown to result in a significant reduction in power consumption. Furthermore, power consumption becomes independent of both read-out speed and imager array size, while still allowing for on read-out FPN correction along with external electronic shutter control. Its potential integration into CMOS imagers, is demonstrated through the full custom design of a programmable 32×32 current-mode CMOS imager in AMIS CMOS 0.35 μm technology.

Original languageEnglish
Title of host publicationESSDERC 2003 - Proceedings of the 33rd European Solid-State Device Research Conference
PublisherIEEE Computer Society
Pages59-62
Number of pages4
ISBN (Electronic)0780379993
ISBN (Print)9780780379992
DOIs
Publication statusPublished - 2003
Externally publishedYes
Event33rd European Solid-State Device Research Conference, ESSDERC 2003 - Estoril, Portugal
Duration: 16 Sep 200318 Sep 2003

Other

Other33rd European Solid-State Device Research Conference, ESSDERC 2003
CountryPortugal
CityEstoril
Period16/9/0318/9/03

Fingerprint

Image sensors
Electric power utilization
Pixels

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

Cite this

Boussaid, F., Bermak, A., & Bouzerdoum, A. (2003). A novel ultra-low power reset/read-out technique for megapixels current-mode CMOS imagers. In ESSDERC 2003 - Proceedings of the 33rd European Solid-State Device Research Conference (pp. 59-62). [1256810] IEEE Computer Society. https://doi.org/10.1109/ESSDERC.2003.1256810

A novel ultra-low power reset/read-out technique for megapixels current-mode CMOS imagers. / Boussaid, Farid; Bermak, Amine; Bouzerdoum, Abdesselam.

ESSDERC 2003 - Proceedings of the 33rd European Solid-State Device Research Conference. IEEE Computer Society, 2003. p. 59-62 1256810.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Boussaid, F, Bermak, A & Bouzerdoum, A 2003, A novel ultra-low power reset/read-out technique for megapixels current-mode CMOS imagers. in ESSDERC 2003 - Proceedings of the 33rd European Solid-State Device Research Conference., 1256810, IEEE Computer Society, pp. 59-62, 33rd European Solid-State Device Research Conference, ESSDERC 2003, Estoril, Portugal, 16/9/03. https://doi.org/10.1109/ESSDERC.2003.1256810
Boussaid F, Bermak A, Bouzerdoum A. A novel ultra-low power reset/read-out technique for megapixels current-mode CMOS imagers. In ESSDERC 2003 - Proceedings of the 33rd European Solid-State Device Research Conference. IEEE Computer Society. 2003. p. 59-62. 1256810 https://doi.org/10.1109/ESSDERC.2003.1256810
Boussaid, Farid ; Bermak, Amine ; Bouzerdoum, Abdesselam. / A novel ultra-low power reset/read-out technique for megapixels current-mode CMOS imagers. ESSDERC 2003 - Proceedings of the 33rd European Solid-State Device Research Conference. IEEE Computer Society, 2003. pp. 59-62
@inproceedings{2de20ab82b3d4cf883fe00d15717f308,
title = "A novel ultra-low power reset/read-out technique for megapixels current-mode CMOS imagers",
abstract = "A novel reset/read-out technique is presented for current-mode ultra-low power megapixel CMOS imagers. In the proposed technique, the reset and readout phases occur simultaneously: as a single pixel is being read-out another pixel is being reset. Such a strategy is shown to result in a significant reduction in power consumption. Furthermore, power consumption becomes independent of both read-out speed and imager array size, while still allowing for on read-out FPN correction along with external electronic shutter control. Its potential integration into CMOS imagers, is demonstrated through the full custom design of a programmable 32×32 current-mode CMOS imager in AMIS CMOS 0.35 μm technology.",
author = "Farid Boussaid and Amine Bermak and Abdesselam Bouzerdoum",
year = "2003",
doi = "10.1109/ESSDERC.2003.1256810",
language = "English",
isbn = "9780780379992",
pages = "59--62",
booktitle = "ESSDERC 2003 - Proceedings of the 33rd European Solid-State Device Research Conference",
publisher = "IEEE Computer Society",

}

TY - GEN

T1 - A novel ultra-low power reset/read-out technique for megapixels current-mode CMOS imagers

AU - Boussaid, Farid

AU - Bermak, Amine

AU - Bouzerdoum, Abdesselam

PY - 2003

Y1 - 2003

N2 - A novel reset/read-out technique is presented for current-mode ultra-low power megapixel CMOS imagers. In the proposed technique, the reset and readout phases occur simultaneously: as a single pixel is being read-out another pixel is being reset. Such a strategy is shown to result in a significant reduction in power consumption. Furthermore, power consumption becomes independent of both read-out speed and imager array size, while still allowing for on read-out FPN correction along with external electronic shutter control. Its potential integration into CMOS imagers, is demonstrated through the full custom design of a programmable 32×32 current-mode CMOS imager in AMIS CMOS 0.35 μm technology.

AB - A novel reset/read-out technique is presented for current-mode ultra-low power megapixel CMOS imagers. In the proposed technique, the reset and readout phases occur simultaneously: as a single pixel is being read-out another pixel is being reset. Such a strategy is shown to result in a significant reduction in power consumption. Furthermore, power consumption becomes independent of both read-out speed and imager array size, while still allowing for on read-out FPN correction along with external electronic shutter control. Its potential integration into CMOS imagers, is demonstrated through the full custom design of a programmable 32×32 current-mode CMOS imager in AMIS CMOS 0.35 μm technology.

UR - http://www.scopus.com/inward/record.url?scp=84907692653&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84907692653&partnerID=8YFLogxK

U2 - 10.1109/ESSDERC.2003.1256810

DO - 10.1109/ESSDERC.2003.1256810

M3 - Conference contribution

SN - 9780780379992

SP - 59

EP - 62

BT - ESSDERC 2003 - Proceedings of the 33rd European Solid-State Device Research Conference

PB - IEEE Computer Society

ER -