A New read-out circuit for low power current and voltage mediated integrating CMOS imager

Amine Bermak, Farid Boussaïd, Abdesselam Bouzerdoum

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

This paper proposes a new read-out strategy for integrating type of CMOS imagers. The approach uses a single counter and two address decoders for generating both the reset and the selection signals needed for an integrating image sensor array together with the electronic shutter functionality. In contrast to the traditional integrating read-out approaches, our reset and read-out phases are carried out simultaneously. The array is scanned with only a single pixel selected for reset and another pixel selected for read-out. This approach results in significant benefits such as silicon area savings, low power operation, simple electronic shutter as well as equal and programmable integration time for all pixels within the array. The functionality of the proposed approach and its VLSI implementation is illustrated using the example of the current-mediated image sensor proposed by McIlrath et al. in [1].

Original languageEnglish
Title of host publicationProceedings, DELTA 2004 - Second IEEE International Workshop on Electronic Design, Test and Applications
Pages35-40
Number of pages6
DOIs
Publication statusPublished - 2004
Externally publishedYes
EventProceedings, DELTA 2004 - Second IEEE International Workshop on Electronic Design, Test and Applications - Perth, Australia
Duration: 28 Jan 200430 Jan 2004

Other

OtherProceedings, DELTA 2004 - Second IEEE International Workshop on Electronic Design, Test and Applications
CountryAustralia
CityPerth
Period28/1/0430/1/04

Fingerprint

Image sensors
Pixels
Networks (circuits)
Electric potential
Sensor arrays
Silicon

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Bermak, A., Boussaïd, F., & Bouzerdoum, A. (2004). A New read-out circuit for low power current and voltage mediated integrating CMOS imager. In Proceedings, DELTA 2004 - Second IEEE International Workshop on Electronic Design, Test and Applications (pp. 35-40) https://doi.org/10.1109/DELTA.2004.10064

A New read-out circuit for low power current and voltage mediated integrating CMOS imager. / Bermak, Amine; Boussaïd, Farid; Bouzerdoum, Abdesselam.

Proceedings, DELTA 2004 - Second IEEE International Workshop on Electronic Design, Test and Applications. 2004. p. 35-40.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bermak, A, Boussaïd, F & Bouzerdoum, A 2004, A New read-out circuit for low power current and voltage mediated integrating CMOS imager. in Proceedings, DELTA 2004 - Second IEEE International Workshop on Electronic Design, Test and Applications. pp. 35-40, Proceedings, DELTA 2004 - Second IEEE International Workshop on Electronic Design, Test and Applications, Perth, Australia, 28/1/04. https://doi.org/10.1109/DELTA.2004.10064
Bermak A, Boussaïd F, Bouzerdoum A. A New read-out circuit for low power current and voltage mediated integrating CMOS imager. In Proceedings, DELTA 2004 - Second IEEE International Workshop on Electronic Design, Test and Applications. 2004. p. 35-40 https://doi.org/10.1109/DELTA.2004.10064
Bermak, Amine ; Boussaïd, Farid ; Bouzerdoum, Abdesselam. / A New read-out circuit for low power current and voltage mediated integrating CMOS imager. Proceedings, DELTA 2004 - Second IEEE International Workshop on Electronic Design, Test and Applications. 2004. pp. 35-40
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