A low power CMOS imager based on Time-To-First-Spike encoding and fair AER

Chen Shoushun, Amine Bermak

Research output: Contribution to journalArticle

30 Citations (Scopus)

Abstract

This paper presents a CMOS vision sensor based on a biologically inspired data representation referred to as Time-to-First-Spike (TFS) encoding combined with a fair Address Event Representation (AER) scheme. Our approach is different from conventional methods because the read-out of information is initiated by the pixel itself while access to the read-out bus is granted only once to each pixel after which it enters into a stand-by mode. This approach allows to greatly save dynamic power consumption and to extensively reduce inefficiencies due to periodical requests of the bus in the case of spiking pixels. Transmission bandwidth is thus significantly improved using the proposed circuitry. Each pixel includes only 14 transistors and occupies an area of 15 × 15 μm2 with a fill factor of 33% using 0.35μm process. The average current consumption is estimated to 10nA per pixel, which is 3 orders of magnitude lower compared with that of the spiking pixel.

Original languageEnglish
Article number1465833
Pages (from-to)5306-5309
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
DOIs
Publication statusPublished - 2005
Externally publishedYes

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Image sensors
Pixels
Transistors
Electric power utilization
Bandwidth
Sensors

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

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abstract = "This paper presents a CMOS vision sensor based on a biologically inspired data representation referred to as Time-to-First-Spike (TFS) encoding combined with a fair Address Event Representation (AER) scheme. Our approach is different from conventional methods because the read-out of information is initiated by the pixel itself while access to the read-out bus is granted only once to each pixel after which it enters into a stand-by mode. This approach allows to greatly save dynamic power consumption and to extensively reduce inefficiencies due to periodical requests of the bus in the case of spiking pixels. Transmission bandwidth is thus significantly improved using the proposed circuitry. Each pixel includes only 14 transistors and occupies an area of 15 × 15 μm2 with a fill factor of 33{\%} using 0.35μm process. The average current consumption is estimated to 10nA per pixel, which is 3 orders of magnitude lower compared with that of the spiking pixel.",
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