A low-latency, low-area hardware oblivious RAM controller

Christopher W. Fletcher, Ling Ren, Albert Kwon, Marten Van Dijk, Emil Stefanov, Dimitrios Serpanos, Srinivas Devadas

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

We build and evaluate Tiny ORAM, an Oblivious RAM prototype on FPGA. Oblivious RAM is a cryptographic primitive that completely obfuscates an application's data, access pattern, and read/write behavior to/from external memory (such as DRAM or disk). Tiny ORAM makes two main contributions. First, by removing an algorithmic bottleneck in prior work, Tiny ORAM is the' first hardware ORAM design to support arbitrary block sizes (e.g., 64 Bytes to 4096 Bytes). With a 64 Byte block size, Tiny ORAM can ' finish an access in 1:4us, over 40x faster than the prior-art implementation. Second, through novel algorithmic and engineering-level optimizations, Tiny ORAM reduces the number of symmetric encryption operations by 3x compared to a prior work. Tiny ORAM is also the ' first design to implement and report real numbers for the cost of symmetric encryption in hardware ORAM constructions. Putting it together, Tiny ORAM requires 18381 (5%) LUTs and 146 (13%) Block RAM on a Xilinx XC7VX485T FPGA, including the cost of encryption.

Original languageEnglish
Title of host publicationProceedings - 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages215-222
Number of pages8
ISBN (Print)9781479999699
DOIs
Publication statusPublished - 15 Jul 2015
Event23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015 - Vancouver, Canada
Duration: 3 May 20155 May 2015

Other

Other23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015
CountryCanada
CityVancouver
Period3/5/155/5/15

Fingerprint

Random access storage
Cryptography
Hardware
Controllers
Field programmable gate arrays (FPGA)
Dynamic random access storage
Computer hardware
Costs
Data storage equipment

Keywords

  • Cryptographic Accelerator
  • Oblivious RAM
  • Storage System

ASJC Scopus subject areas

  • Computer Science (miscellaneous)
  • Hardware and Architecture

Cite this

Fletcher, C. W., Ren, L., Kwon, A., Van Dijk, M., Stefanov, E., Serpanos, D., & Devadas, S. (2015). A low-latency, low-area hardware oblivious RAM controller. In Proceedings - 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015 (pp. 215-222). [7160074] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/FCCM.2015.58

A low-latency, low-area hardware oblivious RAM controller. / Fletcher, Christopher W.; Ren, Ling; Kwon, Albert; Van Dijk, Marten; Stefanov, Emil; Serpanos, Dimitrios; Devadas, Srinivas.

Proceedings - 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 215-222 7160074.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Fletcher, CW, Ren, L, Kwon, A, Van Dijk, M, Stefanov, E, Serpanos, D & Devadas, S 2015, A low-latency, low-area hardware oblivious RAM controller. in Proceedings - 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015., 7160074, Institute of Electrical and Electronics Engineers Inc., pp. 215-222, 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015, Vancouver, Canada, 3/5/15. https://doi.org/10.1109/FCCM.2015.58
Fletcher CW, Ren L, Kwon A, Van Dijk M, Stefanov E, Serpanos D et al. A low-latency, low-area hardware oblivious RAM controller. In Proceedings - 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015. Institute of Electrical and Electronics Engineers Inc. 2015. p. 215-222. 7160074 https://doi.org/10.1109/FCCM.2015.58
Fletcher, Christopher W. ; Ren, Ling ; Kwon, Albert ; Van Dijk, Marten ; Stefanov, Emil ; Serpanos, Dimitrios ; Devadas, Srinivas. / A low-latency, low-area hardware oblivious RAM controller. Proceedings - 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 215-222
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