A digitally programmable current mode analog shunting inhibition cellular neural network

Amine Bermak, Farid Boussa Èdand Abdesselam Bouzerdoum

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A novel read-out and column circuit for VLSI implementation of a Shunting Inhibition Cellular Neural Network (SICNN) is proposed. Image enhancement and edge detection based on SICNN with programmable mask size are achieved within a CMOS imager. In contrast to most existing implementations, the circuit is based on a mixed analog digital approach in which the read-out is realized using a digital circuit while the processing takes advantage of the compactness and low power of the current mode approach. The mask size and coef®cients can be varied with a digitally programmable current mode analog processor. In addition, the pixel output and the processed SICNN output are obtained simultaneously on the -y resulting in a real-time computation of SICNN. The imager has been fabricated using 0.7 μm CMOS technology.

Original languageEnglish
Title of host publicationICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems
Pages962-965
Number of pages4
Volume2
DOIs
Publication statusPublished - 2000
Externally publishedYes
Event7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000 - Jounieh, Lebanon
Duration: 17 Dec 200020 Dec 2000

Other

Other7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000
CountryLebanon
CityJounieh
Period17/12/0020/12/00

Fingerprint

Cellular neural networks
Image sensors
Masks
Networks (circuits)
Image enhancement
Digital circuits
Edge detection
Pixels
Processing

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Bermak, A., & Bouzerdoum, F. B. È. A. (2000). A digitally programmable current mode analog shunting inhibition cellular neural network. In ICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems (Vol. 2, pp. 962-965). [913036] https://doi.org/10.1109/ICECS.2000.913036

A digitally programmable current mode analog shunting inhibition cellular neural network. / Bermak, Amine; Bouzerdoum, Farid Boussa Èdand Abdesselam.

ICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems. Vol. 2 2000. p. 962-965 913036.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bermak, A & Bouzerdoum, FBÈA 2000, A digitally programmable current mode analog shunting inhibition cellular neural network. in ICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems. vol. 2, 913036, pp. 962-965, 7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000, Jounieh, Lebanon, 17/12/00. https://doi.org/10.1109/ICECS.2000.913036
Bermak A, Bouzerdoum FBÈA. A digitally programmable current mode analog shunting inhibition cellular neural network. In ICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems. Vol. 2. 2000. p. 962-965. 913036 https://doi.org/10.1109/ICECS.2000.913036
Bermak, Amine ; Bouzerdoum, Farid Boussa Èdand Abdesselam. / A digitally programmable current mode analog shunting inhibition cellular neural network. ICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems. Vol. 2 2000. pp. 962-965
@inproceedings{355cb22ae43d45529205afe80028ac9e,
title = "A digitally programmable current mode analog shunting inhibition cellular neural network",
abstract = "A novel read-out and column circuit for VLSI implementation of a Shunting Inhibition Cellular Neural Network (SICNN) is proposed. Image enhancement and edge detection based on SICNN with programmable mask size are achieved within a CMOS imager. In contrast to most existing implementations, the circuit is based on a mixed analog digital approach in which the read-out is realized using a digital circuit while the processing takes advantage of the compactness and low power of the current mode approach. The mask size and coef{\circledR}cients can be varied with a digitally programmable current mode analog processor. In addition, the pixel output and the processed SICNN output are obtained simultaneously on the -y resulting in a real-time computation of SICNN. The imager has been fabricated using 0.7 μm CMOS technology.",
author = "Amine Bermak and Bouzerdoum, {Farid Boussa {\`E}dand Abdesselam}",
year = "2000",
doi = "10.1109/ICECS.2000.913036",
language = "English",
isbn = "0780365429",
volume = "2",
pages = "962--965",
booktitle = "ICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems",

}

TY - GEN

T1 - A digitally programmable current mode analog shunting inhibition cellular neural network

AU - Bermak, Amine

AU - Bouzerdoum, Farid Boussa Èdand Abdesselam

PY - 2000

Y1 - 2000

N2 - A novel read-out and column circuit for VLSI implementation of a Shunting Inhibition Cellular Neural Network (SICNN) is proposed. Image enhancement and edge detection based on SICNN with programmable mask size are achieved within a CMOS imager. In contrast to most existing implementations, the circuit is based on a mixed analog digital approach in which the read-out is realized using a digital circuit while the processing takes advantage of the compactness and low power of the current mode approach. The mask size and coef®cients can be varied with a digitally programmable current mode analog processor. In addition, the pixel output and the processed SICNN output are obtained simultaneously on the -y resulting in a real-time computation of SICNN. The imager has been fabricated using 0.7 μm CMOS technology.

AB - A novel read-out and column circuit for VLSI implementation of a Shunting Inhibition Cellular Neural Network (SICNN) is proposed. Image enhancement and edge detection based on SICNN with programmable mask size are achieved within a CMOS imager. In contrast to most existing implementations, the circuit is based on a mixed analog digital approach in which the read-out is realized using a digital circuit while the processing takes advantage of the compactness and low power of the current mode approach. The mask size and coef®cients can be varied with a digitally programmable current mode analog processor. In addition, the pixel output and the processed SICNN output are obtained simultaneously on the -y resulting in a real-time computation of SICNN. The imager has been fabricated using 0.7 μm CMOS technology.

UR - http://www.scopus.com/inward/record.url?scp=77956051286&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77956051286&partnerID=8YFLogxK

U2 - 10.1109/ICECS.2000.913036

DO - 10.1109/ICECS.2000.913036

M3 - Conference contribution

SN - 0780365429

SN - 9780780365421

VL - 2

SP - 962

EP - 965

BT - ICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems

ER -