A Compact 3-D VLSI Classifier Using Bagging Threshold Network Ensembles

Amine Bermak, Dominique Martinez

Research output: Contribution to journalArticle

41 Citations (Scopus)

Abstract

A bagging ensemble consists of a set of classifiers trained independently and combined by a majority vote. Such a combination improves generalization performance but can require large amounts of memory and computation, a serious drawback for addressing portable real-time pattern recognition applications. We report here a compact three-dimensional (3-D) multiprecision very large-scale integration (VLSI) implementation of a bagging ensemble. In our circuit, individual classifiers are decision trees implemented as threshold networks-one layer of threshold logic units (TLUs) followed by combinatorial logic functions. The hardware was fabricated using 0.7-μm CMOS technology and packaged using MCM-V micro-packaging technology. The 3-D chip implements up to 192 TLUs operating at a speed of up to 48GCPPS and implemented in a volume of (w × L × h) = (2 × 2 × 0.7) cm3. The 3-D circuit features a high level of programmability and flexibility offering the possibility to make an efficient use of the hardware resources in order to reduce the power consumption. Successful operation of the 3-D chip for various precisions and ensemble sizes is demonstrated through an electronic nose application.

Original languageEnglish
Pages (from-to)1097-1109
Number of pages13
JournalIEEE Transactions on Neural Networks
Volume14
Issue number5
DOIs
Publication statusPublished - Sep 2003
Externally publishedYes

Fingerprint

Threshold logic
VLSI circuits
Classifiers
Hardware
Networks (circuits)
Multicarrier modulation
Decision trees
Electronic Nose
Pattern recognition
Technology
Packaging
Decision Trees
Electric power utilization
Product Packaging
Data storage equipment
Electronic nose

Keywords

  • Bagging
  • Decision trees
  • Three-dimensional (3-D) packaging technology
  • Threshold networks
  • Very large-scale integration (VLSI)

ASJC Scopus subject areas

  • Software
  • Medicine(all)
  • Computer Science Applications
  • Computer Networks and Communications
  • Artificial Intelligence

Cite this

A Compact 3-D VLSI Classifier Using Bagging Threshold Network Ensembles. / Bermak, Amine; Martinez, Dominique.

In: IEEE Transactions on Neural Networks, Vol. 14, No. 5, 09.2003, p. 1097-1109.

Research output: Contribution to journalArticle

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