A CMOS image sensor with on chip image compression based on predictive boundary adaptation and QTD algorithm

Chen Shoushun, Amine Bermak, Wang Yan, Dominique Martinez

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

This paper presents the architecture, algorithm and VLSI hardware of image acquisition, storage and compression on a single-chip CMOS image sensor. The image array is based on time domain digital pixel sensor technology equipped with nondestructive storage capability using 8-bit Static-RAM device embedded at the pixel level. An adaptive quantization scheme based on Fast Boundary Adaptation Rule (FBAR) and Differential Pulse Code Modulation (DPCM) procedure followed by an online Quadrant Tree Decomposition (QTD) processing is proposed enabling low power, robust and compact image compression processor. A prototype chip including 64 × 64 pixels, read-out and control circuitry as well as the compression processor was implemented in 0.35μm CMOS technology with a silicon area of 3.2 × 3.0mm2. Simulation results show compression figures corresponding to 0.75 Bit-per-Pixel (BPP), while maintaining reasonable PSNR levels.

Original languageEnglish
Title of host publicationThe 6th IEEE Conference on SENSORS, IEEE SENSORS 2007
Pages531-534
Number of pages4
DOIs
Publication statusPublished - 2007
Externally publishedYes
Event6th IEEE Conference on SENSORS, IEEE SENSORS 2007 - Atlanta, GA, United States
Duration: 28 Oct 200731 Oct 2007

Other

Other6th IEEE Conference on SENSORS, IEEE SENSORS 2007
CountryUnited States
CityAtlanta, GA
Period28/10/0731/10/07

Fingerprint

Image compression
Image sensors
Pixels
Differential pulse code modulation
Image acquisition
Random access storage
Decomposition
Hardware
Silicon
Sensors
Processing

ASJC Scopus subject areas

  • Engineering (miscellaneous)
  • Electrical and Electronic Engineering

Cite this

Shoushun, C., Bermak, A., Yan, W., & Martinez, D. (2007). A CMOS image sensor with on chip image compression based on predictive boundary adaptation and QTD algorithm. In The 6th IEEE Conference on SENSORS, IEEE SENSORS 2007 (pp. 531-534). [4388453] https://doi.org/10.1109/ICSENS.2007.4388453

A CMOS image sensor with on chip image compression based on predictive boundary adaptation and QTD algorithm. / Shoushun, Chen; Bermak, Amine; Yan, Wang; Martinez, Dominique.

The 6th IEEE Conference on SENSORS, IEEE SENSORS 2007. 2007. p. 531-534 4388453.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Shoushun, C, Bermak, A, Yan, W & Martinez, D 2007, A CMOS image sensor with on chip image compression based on predictive boundary adaptation and QTD algorithm. in The 6th IEEE Conference on SENSORS, IEEE SENSORS 2007., 4388453, pp. 531-534, 6th IEEE Conference on SENSORS, IEEE SENSORS 2007, Atlanta, GA, United States, 28/10/07. https://doi.org/10.1109/ICSENS.2007.4388453
Shoushun C, Bermak A, Yan W, Martinez D. A CMOS image sensor with on chip image compression based on predictive boundary adaptation and QTD algorithm. In The 6th IEEE Conference on SENSORS, IEEE SENSORS 2007. 2007. p. 531-534. 4388453 https://doi.org/10.1109/ICSENS.2007.4388453
Shoushun, Chen ; Bermak, Amine ; Yan, Wang ; Martinez, Dominique. / A CMOS image sensor with on chip image compression based on predictive boundary adaptation and QTD algorithm. The 6th IEEE Conference on SENSORS, IEEE SENSORS 2007. 2007. pp. 531-534
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