A CMOS image sensor using variable reference time domain encoding

M. K. Law, Amine Bermak

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

In this paper, a Variable Reference Time Domain Encoding CMOS image sensor is presented. The time domain encoding vision sensor is known to suffer from slow conversion time, especially at low level of illumination. This is due to limited photocurrent generated to discharge the photodiode junction voltage to the reference voltage. A variable referencing scheme is proposed so that the reference voltage will be modulated and bounded by a specified deadline. The pixel consists of a photodiode, an analogue comparator, an 8-bit SRAM, a SR latch, and occupies an area of 32μm × 35μm, with a fill-factor of 12.6% using a 0.35μm CMOS process. Simulation results show that signal conversion can be achieved by using pre-defined threshold voltages. By using four levels of reference voltage and 1/10 of the original conversion time required by the original time domain encoding, over 70% reduction in total integration time can be achieved.

Original languageEnglish
Article number4253159
Pages (from-to)2399-2402
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Publication statusPublished - 2007
Externally publishedYes

Fingerprint

Image sensors
Electric potential
Photodiodes
Static random access storage
Photocurrents
Threshold voltage
Lighting
Pixels
Sensors

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

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abstract = "In this paper, a Variable Reference Time Domain Encoding CMOS image sensor is presented. The time domain encoding vision sensor is known to suffer from slow conversion time, especially at low level of illumination. This is due to limited photocurrent generated to discharge the photodiode junction voltage to the reference voltage. A variable referencing scheme is proposed so that the reference voltage will be modulated and bounded by a specified deadline. The pixel consists of a photodiode, an analogue comparator, an 8-bit SRAM, a SR latch, and occupies an area of 32μm × 35μm, with a fill-factor of 12.6{\%} using a 0.35μm CMOS process. Simulation results show that signal conversion can be achieved by using pre-defined threshold voltages. By using four levels of reference voltage and 1/10 of the original conversion time required by the original time domain encoding, over 70{\%} reduction in total integration time can be achieved.",
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