This brief presents a CMOS temperature sensor suitable for ultralow-power applications.With a MOS transistor operating in the linear region, a linear relationship between delay and temperature can be obtained. A differential sensing architecture is utilized to reduce the signal offset and increase the effective signal-to-noise ratio. A design methodology concerning power optimization and improved sensor linearity is also presented. The sensor, which occupies 0.0324 mm2, is fabricated using the TSMC 0.18-μm one-polysilicon six-metal (1P6M) process. Measurement results show that the sensor consumes 405 nW with a 1-V supply at 1 ksample/s at room temperature. An inaccuracy value of-0.8 °C to +1 °C from 0 °C to 100 °C after calibration is achieved.
|Number of pages||5|
|Journal||IEEE Transactions on Circuits and Systems II: Express Briefs|
|Publication status||Published - 1 Dec 2009|
- CMOS temperature sensor
- Ultralow-power applications
ASJC Scopus subject areas
- Electrical and Electronic Engineering