3D packaging technology for vision CMOS VLSI: Review and performance evaluation

A. Bermak, A. Bouzerdoum, K. Eshraghian

Research output: Contribution to journalConference article

Abstract

In many applications, such as multimedia and on-chip camera, there is a need for the production of low power, low weight and low cost integrated circuits. Several CMOS vision chips have been proposed in the literature. Some limitations of conventional 2D architectures are discussed and a new 3D generation of vision chips is presented and reviewed in this paper. As a result of this analysis, some conclusions on the advantages and limitations of 2D vision chips and the feasibility of the 3D approach are explored.

Original languageEnglish
Pages (from-to)248-256
Number of pages9
JournalProceedings of SPIE - The International Society for Optical Engineering
Volume3891
Publication statusPublished - 1 Dec 1999
EventProceedings of the 1999 Electronics and Structures for MEMS - Royal Pines Resort, Aust
Duration: 27 Oct 199929 Oct 1999

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ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Computer Science Applications
  • Applied Mathematics
  • Electrical and Electronic Engineering

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