1-bit heuristic adaptive quantizer (HAQ) for on chip image compression in CMOS image sensors

Michael Barrow, Amine Bermak, Shoushun Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents an algorithm for implementing a single bit adaptive quantizer based on fast boundary adaptation rule (FBAR). The peak signal to noise ratio (PSNR) gain and performance gain of the algorithm over prior designs is found to be larger than that displayed by prior art compared with a reference FBAR implementation. A maximum increase of 1.44db was seen. In addition, the new design facilitates an improved bits per pixel ratio (bpp) when integrated with the QTD compressor utilized in previous prototypes. The presented algorithm is hardware friendly and designed for low power implementation, with simulation results also showing an improvement of relative energy cost over previous work. Experimental evidence for image sizes ranging from 6464 pixels to 512512 pixels and the heuristic adaptive quantizer (HAQ) algorithm are detailed in this paper.

Original languageEnglish
Title of host publication2011 International Symposium on Integrated Circuits, ISIC 2011
Pages613-616
Number of pages4
DOIs
Publication statusPublished - 2011
Externally publishedYes
Event2011 International Symposium on Integrated Circuits, ISIC 2011 - SingaporeSingapore, Singapore
Duration: 12 Dec 201114 Dec 2011

Other

Other2011 International Symposium on Integrated Circuits, ISIC 2011
CountrySingapore
CitySingaporeSingapore
Period12/12/1114/12/11

Fingerprint

Image compression
Image sensors
Pixels
Heuristic algorithms
Adaptive algorithms
Compressors
Signal to noise ratio
Hardware
Costs

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Barrow, M., Bermak, A., & Chen, S. (2011). 1-bit heuristic adaptive quantizer (HAQ) for on chip image compression in CMOS image sensors. In 2011 International Symposium on Integrated Circuits, ISIC 2011 (pp. 613-616). [6131937] https://doi.org/10.1109/ISICir.2011.6131937

1-bit heuristic adaptive quantizer (HAQ) for on chip image compression in CMOS image sensors. / Barrow, Michael; Bermak, Amine; Chen, Shoushun.

2011 International Symposium on Integrated Circuits, ISIC 2011. 2011. p. 613-616 6131937.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Barrow, M, Bermak, A & Chen, S 2011, 1-bit heuristic adaptive quantizer (HAQ) for on chip image compression in CMOS image sensors. in 2011 International Symposium on Integrated Circuits, ISIC 2011., 6131937, pp. 613-616, 2011 International Symposium on Integrated Circuits, ISIC 2011, SingaporeSingapore, Singapore, 12/12/11. https://doi.org/10.1109/ISICir.2011.6131937
Barrow M, Bermak A, Chen S. 1-bit heuristic adaptive quantizer (HAQ) for on chip image compression in CMOS image sensors. In 2011 International Symposium on Integrated Circuits, ISIC 2011. 2011. p. 613-616. 6131937 https://doi.org/10.1109/ISICir.2011.6131937
Barrow, Michael ; Bermak, Amine ; Chen, Shoushun. / 1-bit heuristic adaptive quantizer (HAQ) for on chip image compression in CMOS image sensors. 2011 International Symposium on Integrated Circuits, ISIC 2011. 2011. pp. 613-616
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